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AD73322LARUZ1

更新时间: 2022-02-26 10:58:05
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
49页 767K
描述
Low Cost, Low Power CMOS General-Purpose Dual Analog Front

AD73322LARUZ1 数据手册

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Low Cost, Low Power CMOS  
General-Purpose Dual Analog Front End  
AD73322L  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
Two 16-bit A/D converters  
Two 16-bit D/A converters  
Programmable input/output sample rates  
78 dB ADC SNR  
AVDD1 AVDD2 DVDD  
AD73322L  
VFBP1  
SDI  
SDIFS  
VINP1  
VINN1  
VFBN1  
ADC CHANNEL 1  
78 dB DAC SNR  
64 kHz maximum sample rate  
−90 dB crosstalk  
Low group delay (25 µs typ per ADC channel, 50 µs typ per  
DAC channel)  
VOUTP1  
VOUTN1  
DAC CHANNEL 1  
REFERENCE  
SCLK  
SE  
RESET  
REFOUT  
REFCAP  
SPORT  
Programmable input/output gain  
Flexible serial port allows up to 4 dual codecs to be  
connected in cascade, giving 8 I/O channels  
VFBP2  
VINP2  
VINN2  
VFBN2  
ADC CHANNEL 2  
MCLK  
Single-supply operation (2.7 V to 3.3 V)  
50 mW typ power consumption at 3.0 V  
Temperature range: −40°C to +105°C  
On-chip reference  
SDOFS  
SDO  
VOUTP2  
VOUTN2  
DAC CHANNEL 2  
AGND1 AGND2 DGND  
28-lead SOIC, TSSOP, and 44-lead LQFP packages  
Figure 1.  
APPLICATIONS  
General-purpose analog I/O  
Speech processing  
Cordless and personal communications  
Telephony  
Active control of sound and vibration  
Data communications  
Wireless local loop  
GENERAL DESCRIPTION  
The A/D and D/A conversion channels feature programmable  
input/output gains with ranges of 38 dB and 21 dB, respectively.  
An on-chip reference voltage allows single-supply operation.  
The AD73322L is a dual front-end processor for general-  
purpose applications, including speech and telephony. It  
features two 16-bit A/D conversion channels and two 16-bit  
D/A conversion channels. Each channel provides 78 dB signal-  
to-noise ratio over a voice-band signal bandwidth. It also  
features an input-to-output gain network in both the analog  
and digital domains. This is featured on both codecs and can  
be used for impedance matching or scaling when interfacing to  
subscriber line interface circuits (SLICs).  
The sampling rate of the codecs is programmable with four  
separate settings offering 64 kHz, 32 kHz, 16 kHz, and 8 kHz  
sampling rates (from a master clock of 16.384 MHz).  
A serial port (SPORT) allows easy interfacing of single or  
cascaded devices to industry-standard DSP engines. The  
SPORT transfer rate is programmable to allow interfacing to  
both fast and slow DSP engines.  
The AD73322L is particularly suitable for a variety of appli-  
cations in the speech and telephony area, including low bit rate,  
high quality compression, speech enhancement, recognition,  
and synthesis. The low group delay characteristic of the part  
makes it suitable for single or multichannel active control  
applications.  
The AD73322L is available in 28-lead SOIC, 28-lead TSSOP,  
and 44-lead LQFP packages.  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.326.8703  
www.analog.com  
© 2004 Analog Devices, Inc. All rights reserved.  

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