5秒后页面跳转
AD679SJ PDF预览

AD679SJ

更新时间: 2024-01-13 05:50:12
品牌 Logo 应用领域
亚德诺 - ADI 转换器模数转换器信息通信管理
页数 文件大小 规格书
12页 362K
描述
14-Bit 128 kSPS Complete Sampling ADC

AD679SJ 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:LCC包装说明:CERAMIC, LCC-44
针数:44Reach Compliance Code:not_compliant
ECCN代码:3A001.A.2.CHTS代码:8542.39.00.01
风险等级:5.52Is Samacsys:N
最大模拟输入电压:5 V最小模拟输入电压:-5 V
最长转换时间:6.3 µs转换器类型:ADC, FLASH METHOD
JESD-30 代码:S-CQCC-J44JESD-609代码:e0
长度:16.51 mm最大线性误差 (EL):0.0122%
标称负供电电压:-12 V模拟输入通道数量:1
位数:14功能数量:1
端子数量:44最高工作温度:125 °C
最低工作温度:-55 °C输出位码:BINARY, 2'S COMPLEMENT BINARY
输出格式:PARALLEL, WORD封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:QCCJ封装等效代码:LCC44,.65SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):NOT SPECIFIED电源:5,+-12 V
认证状态:Not Qualified采样速率:0.128 MHz
采样并保持/跟踪并保持:SAMPLE座面最大高度:3.42 mm
子类别:Analog to Digital Converters最大压摆率:34 mA
标称供电电压:12 V表面贴装:YES
技术:BICMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:16.51 mm
Base Number Matches:1

AD679SJ 数据手册

 浏览型号AD679SJ的Datasheet PDF文件第1页浏览型号AD679SJ的Datasheet PDF文件第2页浏览型号AD679SJ的Datasheet PDF文件第3页浏览型号AD679SJ的Datasheet PDF文件第5页浏览型号AD679SJ的Datasheet PDF文件第6页浏览型号AD679SJ的Datasheet PDF文件第7页 
AD679  
TIMING SPECIFICATIONS  
(All device types TMIN to TMAX, VCC = +12 V ؎ 5%, VEE = –12 V ؎ 5%,  
VDD = +5 V ؎ 10%)  
Parameter  
Symbol  
Min  
Max Units  
SC Delay  
tSC  
tC  
50  
ns  
Conversion Time  
Conversion Rate1  
Convert Pulse Width  
Aperture Delay  
Status Delay  
6.3  
7.8  
µs  
µs  
µs  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tCR  
tCP  
tAD  
tSD  
tBA  
0.097 3.0  
5
0
10  
10  
10  
20  
400  
100  
574  
80  
Access Time2, 3  
Float Delay5  
Output Delay  
Format Setup  
OE Delay  
Read Pulse Width  
Conversion Delay  
EOCEN Delay  
tFD  
tOD  
tFS  
tOE  
tRP  
tCD  
tEO  
0
100  
20  
195  
400  
50  
Figure 1. Conversion Timing  
NOTES  
1Includes Acquisition Time.  
2Measured from the falling edge of OE/EOCEN (0.8 V) to the time at which the  
data lines/EOC cross 2.0 V or 0.8 V. See Figure 4.  
3COUT = 100 pF.  
4COUT = 50 pF.  
5Measured from the rising edge of OE/EOCEN (2.0 V) to the time at which the  
output voltage changes by 0.5. See Figure 4; COUT = 10 pF.  
Specifications subject to change without notice.  
ORDERING GUIDE1  
Tested  
Figure 2. Output Timing  
Temperature  
Range  
and  
Package  
Model2  
Package  
Specified Option3  
AD679JN 28-Pin Plastic DIP  
AD679KN 28-Pin Plastic DIP  
AD679JD 28-Pin Ceramic DIP  
AD679KD 28-Pin Ceramic DIP  
AD679AD 28-Pin Ceramic DIP  
AD679BD 28-Pin Ceramic DIP  
AD679SD 28-Pin Ceramic DIP  
AD679TD 28-Pin Ceramic DIP  
0°C to +70°C  
0°C to +70°C  
0°C to +70°C  
0°C to +70°C  
–40°C to +85°C  
–40°C to +85°C  
AC  
AC + DC N-28  
AC D-28  
AC + DC D-28  
AC D-28  
AC + DC D-28  
D-28  
–55°C to +125°C AC + DC D-28  
N-28  
–55°C to +125°C AC  
AD679AJ 44-Lead Ceramic JLCC –40°C to +85°C  
AD679BJ 44-Lead Ceramic JLCC –40°C to +85°C  
AD679SJ 44-Lead Ceramic JLCC –55°C to +125°C AC  
AC  
AC + DC J-44  
J-44  
J-44  
AD679TJ 44-Lead Ceramic JLCC –55°C to +125°C AC + DC J-44  
Figure 3. EOC Timing  
NOTES  
1For parallel read (14-bits) interface to 16-bit buses, see AD779.  
2For details grade and package offerings screened in accordance with MIL-STD-  
883, refer to the Analog Devices Miliary Products Databook or current AD679/  
883B data sheet.  
3N = Plastic DIP; D = Ceramic DIP; J = J-Leaded Ceramic Chip Carrier.  
Figure 4. Load Circuit for Bus Timing Specifications  
–4–  
REV. C  

与AD679SJ相关器件

型号 品牌 描述 获取价格 数据表
AD679SJ/883B ETC Analog-to-Digital Converter, 14-Bit

获取价格

AD679TD ADI 14-Bit 128 kSPS Complete Sampling ADC

获取价格

AD679TD/883B ETC Analog-to-Digital Converter, 14-Bit

获取价格

AD679TJ ADI 14-Bit 128 kSPS Complete Sampling ADC

获取价格

AD679TJ/883B ETC Analog-to-Digital Converter, 14-Bit

获取价格

AD680 ADI Low Power, Low Cost 2.5 V Reference

获取价格