Datasheet > AD671KD-500

AD671KD-500

更新时间： 2024-01-24 17:34:40

品牌	Logo	应用领域
亚德诺 - ADI		转换器
页数	文件大小	规格书
16页	486K
描述
Monolithic 12-Bit 2 MHz A/D Converter

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数据手册

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AD671KD-500 数据手册

AD671

ACOM

11–2

Analog Ground.

V_EE

BIT12 (LSB)

BIT11

BIT10

BIT9

AIN

Analog Input Signal.

Most Significant Bit.

Data Bits 2–11.

23 V_CC

BIT1 (MSB)

BIT2–BIT11

BIT12 (LSB)

BPO/UPO

ACOM

BPO/UPO

AIN

Least Significant Bit.

BIT8

Bipolar or Unipolar

BIT7

AD671

TOP VIEW

(Not to Scale)

REF IN

DCOM

V_LOGIC

Configuration Pin. Connect to

AIN for 0 V to +5 V Span, to

ACOM for 0 V to +10 V Span

and to REF IN for –5 V to

+5 V Span.

BIT6

BIT5

BIT4

BIT3

16 ENCODE

DAV

OTR

MSB

DAV

Data Available Output. The

Rising Edge of DAV Indicates

an End of Conversion and Can

Be Used to Latch Current

Data into an External

BIT2

BIT1 (MSB)

DAV Can Be Used to Latch

Previous Data into an External

DCOM

Digital Ground.

ENCODE

The AD671 Starts a

Conversion on the Rising

Edge of the ENCODE Pulse.

MSB

Inverted Most Significant Bit.

Provides Twos Complement

Output Data Format.

OTR

Out of Range Is Active HIGH

when the analog input is

beyond the input range of the

converter.

REF IN

V_CC

+5 V Reference Input.

+5 V Analog Power.

–5 V Analog Power.

+5 V Digital Power.

V_EE

V_LOGIC

TYPE:

AI = Analog Input

DI = Digital Input

DO = Digital Output

P = Power

–6–

REV. B

1...3 4 567 8 9...16

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