Datasheet > AD652SQ883B2

AD652SQ883B2

更新时间： 2024-02-17 02:34:14

品牌	Logo	应用领域
亚德诺 - ADI		转换器
页数	文件大小	规格书
28页	786K
描述
Monolithic Synchronous Voltage-to-Frequency Converter

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数据手册

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AD652SQ883B2 数据手册

AD652

AD652JP/AQ/SQ

AD652KP/BQ

Parameter

Min

Typ

Max

Min

Typ

Max

Unit

COMPARATOR

Input Bias Current

Common-Mode Voltage

CLOCK INPUT

Maximum Frequency

Threshold Voltage (Referred to Pin ±2)

T_MINto T_MAX

0.ꢀ

ꢀ

0.ꢀ

ꢀ

µA

−V_S+ 4

+ V_S− 4

−V_S+ 4

+V_S− 4

ꢀ

±.2

ꢀ

±.2

MHz

0.8

2.0

0.8

2.0

Input Current

(−V_S< V_CLK< +V_S)

Voltage Range

Rise Time

ꢀ

µA

µs

+V_S

−V_S

OUTPUT STAGE

V_OL(I_OUT= ±0 mA)

I_OL

0.4

V_OL< 0.8 V

µA

250

V_OL< 0.4 V, T_MINto T_MAX

I_OH(Off Leakage)

Delay Time, Positive Clock Edge to Output Pulse

Fall Time (Load = ꢀ00 pF and I_SINK= ꢀ mA)

Output Capacitance

OUTPUT ONE-SHOT

Pulse Width, t_OS

0.0±

200

±00

ꢀ

0.0±

200

±00

ꢀ

150

C_OS= 300 pF

C_OS= ±000 pF

±.ꢀ

ꢀ

±.ꢀ

ꢀ

µs

REFERENCE OUTPUT

Voltage

Drift

ꢀ.0

4.950

5.050

100

4.975

5.025

ppm/°C

Output Current

Source T_MINto T_MAX

Sink

µA

±00

ꢀ00

Power Supply Rejection

Supply Range = ±±2.ꢀ V to ±±7.ꢀ V

Output Impedance (Sourcing Current)

POWER SUPPLY

0.0±ꢀ

%/V

Ω

0.3

Rated Voltage

Operating Range

Dual Supply

Single Supply (−V_S= 0)

Quiescent Current

Digital Common

Analog Common

TEMPERATURE RANGE

Specified Performance

JP, KP Grade

±±ꢀ

±±±

±±ꢀ

±±±

±6

+±2

±±8

+36

+V_S− 4

+V_S

±6

+±2

±±8

+36

+V_S− 4

+V_S

−V_S

–V_S

−V_S

−40

−ꢀꢀ

+70

+8ꢀ

+±2ꢀ

−40

+70

+8ꢀ

°C

AQ, BQ Grade

SQ Grade

^±Referred to internal V_REF. In PLCC package, tested on ±0 V input range only.

Rev. C | Page 4 of 28

1 2 345 6 7...28

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