AD637JD

更新时间： 2024-01-13 06:11:21

品牌	Logo	应用领域
亚德诺 - ADI		转换器模拟特殊功能转换器
页数	文件大小	规格书
10页	163K
描述
High Precision, Wide-Band RMS-to-DC Converter

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技术参数
数据手册

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AD637JD 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	DIP	包装说明：	CERDIP-14
针数：	14	Reach Compliance Code：	not_compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.08	Is Samacsys：	N
转换器类型：	RMS TO DC CONVERTER	JESD-30 代码：	R-GDIP-T14
JESD-609代码：	e0	长度：	19.43 mm
最大线性误差 (EL)：	0.05%	最大负电源电压：	-18 V
最小负电源电压：	-3 V	标称负供电电压：	-15 V
功能数量：	1	端子数量：	14
最大工作频率：	0.15 MHz	最高工作温度：	125 °C
最低工作温度：	-55 °C	封装主体材料：	CERAMIC, GLASS-SEALED
封装代码：	DIP	封装等效代码：	DIP14,.3
封装形状：	RECTANGULAR	封装形式：	IN-LINE
峰值回流温度（摄氏度）：	NOT SPECIFIED	最大正输入电压：	7 V
电源：	+-15 V	认证状态：	Not Qualified
座面最大高度：	5.08 mm	子类别：	Analog Special Function Converters
最大压摆率：	3 mA	最大供电电压：	18 V
最小供电电压：	3 V	标称供电电压：	15 V
表面贴装：	NO	温度等级：	MILITARY
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	最大总误差：	0.7%
宽度：	7.62 mm	Base Number Matches：	1

AD637JD 数据手册

AD637

OPTIONAL TRIMS FOR HIGH ACCURACY

functions of input signal frequency f, and the averaging time

constant τ (τ: 25 ms/µF of averaging capacitance). As shown in

Figure 6, the averaging error is defined as the peak value of the

ac component, ripple, plus the value of the dc error.

The AD637 includes provisions to allow the user to trim out

both output offset and scale factor errors. These trims will result

in significant reduction in the maximum total error as shown in

Figure 4. This remaining error is due to a nontrimmable input

offset in the absolute value circuit and the irreducible non-

linearity of the device.

The peak value of the ac ripple component of the averaging er-

ror is defined approximately by the relationship:

6.3 τf

The trimming procedure on the AD637 is as follows:

in % of reading where (t > 1/f)

l. Ground the input signal, V_INand adjust R1 to give 0 V out-

put from Pin 9. Alternatively R1 can be adjusted to give the

IDEAL

correct output with the lowest expected value of V_IN

DC ERROR = AVERAGE OF OUTPUT–IDEAL

2. Connect the desired full scale input to V_IN, using either a dc

or a calibrated ac signal, trim R3 to give the correct output at

Pin 9, i.e., 1 V dc should give l.000 V dc output. Of course, a

2 V peak-to-peak sine wave should give 0.707 V dc output.

Remaining errors are due to the nonlinearity.

AVERAGE ERROR

DOUBLE-FREQUENCY

RIPPLE

TIME

5.0

Figure 6. Typical Output Waveform for a Sinusoidal Input

AD637K MAX

This ripple can add a significant amount of uncertainty to the

accuracy of the measurement being made. The uncertainty can

be significantly reduced through the use of a post filtering net-

work or by increasing the value of the averaging capacitor.

2.5

INTERNAL TRIM

AD637K

EXTERNAL TRIM

The dc error appears as a frequency dependent offset at the

output of the AD637 and follows the equation:

in % of reading

0.16 + 6.4τ²f ²

2.5

AD637K: 0.5mV ؎0.2%

0.25mV ؎0.05%

EXTERNAL

Since the averaging time constant, set by C_AV, directly sets the

time that the rms converter “holds” the input signal during

computation, the magnitude of the dc error is determined only

by C_AVand will not be affected by post filtering.

5.0

0.5

1.0

1.5

2.0

INPUT LEVEL – Volts

100

Figure 4. Max Total Error vs. Input Level AD637K

Internal and External Trims

BUFFER

AD637

147⍀

ABSOLUTE

VALUE

PEAK RIPPLE

1.0

BIAS

SECTION

OUTPUT

OFFSET

ADJUST

SQUARER/DIVIDER

50k⍀

–V

DC ERROR

1M⍀

25k⍀

–V

0.1

25k⍀

100

10k

V rms

OUT

SINEWAVE INPUT FREQUENCY – Hz

FILTER

Figure 7. Comparison of Percent DC Error to the Percent

Peak Ripple over Frequency Using the AD637 in the Stan-

dard RMS Connection with a 1 × µF C_AV

1k⍀

The ac ripple component of averaging error can be greatly

reduced by increasing the value of the averaging capacitor.

There are two major disadvantages to this: first, the value of the

averaging capacitor will become extremely large and second, the

settling time of the AD637 increases in direct proportion to the

value of the averaging capacitor (Ts = 115 ms/µF of averaging

capacitance). A preferable method of reducing the ripple is

through the use of the post filter network, shown in Figure 8.

This network can be used in either a one or two pole configura-

tion. For most applications the single pole filter will give the

best overall compromise between ripple and settling time.

SCALE FACTOR ADJUST,

؎2%

Figure 5. Optional External Gain and Offset Trims

CHOOSING THE AVERAGING TIME CONSTANT

The AD637 will compute the true rms value of both dc and ac

input signals. At dc the output will track the absolute value of

the input exactly; with ac signals the AD637’s output will ap-

proach the true rms value of the input. The deviation from the

ideal rms value is due to an averaging error. The averaging error

is comprised of an ac and dc component. Both components are

REV. E

–5–

1 2 3 456 7 8...10

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AD637JD/+	ADI	RMS TO DC CONVERTER, 0.15MHz, CDIP14, SIDE BRAZED, CERAMIC, DIP-14	获取价格
AD637JDZ	ADI	High Precision, Wideband RMS-to-DC Converter	获取价格
AD637JQ	ADI	High Precision, Wide-Band RMS-to-DC Converter	获取价格
AD637JR	ADI	High Precision, Wide-Band RMS-to-DC Converter	获取价格
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