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AD630SE/883B PDF预览

AD630SE/883B

更新时间: 2024-02-26 14:53:17
品牌 Logo 应用领域
亚德诺 - ADI 消费电路商用集成电路
页数 文件大小 规格书
12页 318K
描述
Balanced Modulator/Demodulator

AD630SE/883B 技术参数

生命周期:ActiveReach Compliance Code:unknown
风险等级:5.56Is Samacsys:N
Base Number Matches:1

AD630SE/883B 数据手册

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AD630  
ABSOLUTE MAXIMUM RATINGS  
THERMAL CHARACTERISTICS  
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V  
Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . 600 mW  
Output Short-Circuit to Ground . . . . . . . . . . . . . . . Indefinite  
Storage Temperature, Ceramic Package . . . –65°C to +150°C  
Storage Temperature, Plastic Package . . . . . –55°C to +125°C  
Lead Temperature Range (Soldering, 10 sec) . . . . . . . . 300°C  
Maximum Junction Temperature . . . . . . . . . . . . . . . . . 150°C  
JA  
JC  
20-Lead PDIP (N)  
20-Lead Ceramic DIP (D)  
24°C/W 61°C/W  
35°C/W 120°C/W  
20-Lead Leadless Chip Carrier LCC (E) 35°C/W 120°C/W  
20-Lead SOIC (R-20)  
38°C/W 75°C/W  
ORDERING GUIDE  
Temperature Ranges Package Description  
Model  
Package Option  
AD630JN  
AD630KN  
AD630AR  
AD630AR-REEL  
AD630AD  
0°C to 70°C  
PDIP  
PDIP  
SOIC  
N-20  
N-20  
R-20  
0°C to 70°C  
–25°C to +85°C  
–25°C to +85°C  
–25°C to +85°C  
–25°C to +85°C  
–55°C to +125°C  
–55°C to +125°C  
–55°C to +125°C  
–55°C to +125°C  
–55°C to +125°C  
0°C to 70°C  
SOIC 13" Tape and Reel R-20  
SBDIP  
SBDIP  
SBDIP  
SBDIP  
SBDIP  
CLCC  
CLCC  
Chip  
D-20  
D-20  
D-20  
D-20  
D-20  
E-20A  
E-20A  
AD630BD  
AD630SD  
AD630SD/883B  
5962-8980701RA  
AD630SE/883B  
5962-89807012A  
AD630JCHIPS  
AD630SCHIPS  
–55°C to +125°C  
Chip  
PIN CONFIGURATIONS  
CHIP METALLIZATION AND PINOUT  
Dimensions shown in inches and (millimeters).  
Contact factory for latest dimensions.  
20-Lead SOIC, PDIP, and CERDIP  
R
A
CH A–  
20  
1
2
IN  
CH A+  
19 CH B–  
CH B+  
3
18  
17  
16  
15  
14  
13  
DIFF OFF ADJ  
DIFF OFF ADJ  
CM OFF ADJ  
4
R
R
B
IN  
5
AD630  
A
TOP VIEW  
6
R
R
CM OFF ADJ  
F
(Not to Scale)  
7
CHANNEL STATUS B/A  
B
–V  
S
8
V
OUT  
SEL B  
SEL A  
12 COMP  
11  
9
10  
+V  
S
20-Terminal CLCC  
3
2
1 20 19  
CHIP AVAILABILITY  
The AD630 is available in laser trimmed, passivated chip  
form. The figure above shows the AD630 metallization pattern,  
bonding pads and dimensions. AD630 chips are available; con-  
sult factory for details.  
4
5
DIFF OFF ADJ  
CM OFF ADJ  
18 CH B+  
17  
R
B
IN  
AD630  
CM OFF ADJ 6  
16  
15  
R
R
R
A
TOP VIEW  
(Not to Scale)  
CHANNEL STATUS B/A 7  
F
–V  
8
14  
B
S
9
10 11 12 13  
CAUTION  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily  
accumulate on the human body and test equipment and can discharge without detection. Although  
the AD630 features proprietary ESD protection circuitry, permanent damage may occur on devices  
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are  
recommended to avoid performance degradation or loss of functionality.  
REV. E  
–3–  

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