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AD548JRZ-REEL

更新时间： 2024-02-20 02:01:05

品牌	Logo	应用领域
亚德诺 - ADI		运算放大器
页数	文件大小	规格书
8页	200K
描述
IC OP-AMP, 3000 uV OFFSET-MAX, 1 MHz BAND WIDTH, PDSO8, SOIC-8, Operational Amplifier

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技术参数
数据手册

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AD548JRZ-REEL 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Active	零件包装代码：	DIP
包装说明：	HERMETIC SEALED, CERDIP-8	针数：	8
Reach Compliance Code：	unknown	风险等级：	5.45
放大器类型：	OPERATIONAL AMPLIFIER	最大平均偏置电流 (IIB)：	0.00001 µA
标称共模抑制比：	92 dB	最大输入失调电压：	500 µV
JESD-30 代码：	R-GDIP-T8	JESD-609代码：	e0
湿度敏感等级：	NOT SPECIFIED	负供电电压上限：	-18 V
标称负供电电压 (Vsup)：	-15 V	功能数量：	1
端子数量：	8	最高工作温度：	125 °C
最低工作温度：	-55 °C	封装主体材料：	CERAMIC, GLASS-SEALED
封装代码：	DIP	封装形状：	RECTANGULAR
封装形式：	IN-LINE	峰值回流温度（摄氏度）：	NOT SPECIFIED
座面最大高度：	5.08 mm	标称压摆率：	1.8 V/us
子类别：	Operational Amplifier	供电电压上限：	18 V
标称供电电压 (Vsup)：	15 V	表面贴装：	NO
技术：	BIFET	温度等级：	MILITARY
端子面层：	TIN LEAD	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	标称均一增益带宽：	1000 kHz
宽度：	7.62 mm	Base Number Matches：	1

AD548JRZ-REEL 数据手册

Typical Characteristics–AD548

Figure 19a. Unity Gain Follower

Figure 19c. Unity Gain Follower

Pulse Response (Sm all Signal)

Figure 19b. Unity Gain Follower

Pulse Response (Large Signal)

Figure 20a. Utility Gain Inverter

Figure 20b. Utility Gain Inverter

Pulse Response (Large Signal)

Figure 20c. Unity Gain Inverter

Pulse Response (Sm all Signal)

AP P LICATIO N NO TES

Applying the AD548

T he AD548 is a JFET -input op amp with a guaranteed maxi-

mum I_Bof less than 10 pA, and offset and drift laser-trimmed to

0.25 mV and 2 µV/°C respectively (AD548C). AC specs in-

clude 1 MHz bandwidth, 1.8 V/µs typical slew rate and 8 µs set-

tling time for a 20 V step to ±0.01%—all at a supply current less

than 200 µA. T o capitalize on the device’s performance, a num-

ber of error sources should be considered.

T he minimal power drain and low offset drift of the AD548

reduce self-heating or “warm-up” effects on input offset voltage,

making the AD548 ideal for on/off battery powered applica-

tions. T he power dissipation due to the AD548’s 200 µA supply

current has a negligible effect on input current, but heavy out-

put loading will raise the chip temperature. Since a JFET ’s in-

put current doubles for every 10°C rise in chip temperature, this

can be a noticeable effect.

Figure 21. Offset Null Configuration

LAYO UT

T o take full advantage of the AD548’s 10 pA max input current,

parasitic leakages must be kept below an acceptable level. T he

practical limit of the resistance of epoxy or phenolic circuit

board material is between 1 × 10¹²Ω and 3 × 10¹²Ω. T his can

result in an additional leakage of 5 pA between an input of 0 V

and a –15 V supply line. T eflon or a similar low leakage material

(with a resistance exceeding 10¹⁷Ω) should be used to isolate

high impedance input lines from adjacent lines carrying high

voltages. T he insulator should be kept clean, since contaminants

will degrade the surface resistance.

T he amplifier is designed to be functional with power supply

voltages as low as ±4.5 V. It will exhibit a higher input offset

voltage than at the rated supply voltage of ±15 V, due to power

supply rejection effects. T he common-mode range of the

AD548 extends from 3 V more positive than the negative supply

to 1 V more negative than the positive supply. Designed to

cleanly drive up to 10 kΩ and 100 pF loads, the AD548 will

drive a 2 kΩ load with reduced open loop gain.

O FFSET NULLING

Unlike bipolar input amplifiers, zeroing the input offset voltage

of a BiFET op amp will not minimize offset drift. Using balance

Pins 1 and 5 to adjust the input offset voltage as shown in Fig-

ure 21 will induce an added drift of 0.24 µV/°C per 100 µV of

nulled offset. T he low initial offset (0.25 mV) of the AD548C

results in only 0.6 µV/°C of additional drift.

A metal guard completely surrounding the high impedance

nodes and driven by a voltage near the common-mode input po-

tential can also be used to reduce some parasitic leakages. T he

guarding pattern in Figure 22 will reduce parasitic leakage due

to finite board surface resistance; but it will not compensate for

a low volume resistivity board.

REV. C

–5–

1 2 3 456 7 8

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与AD548JRZ-REEL相关器件

型号	品牌	描述	获取价格	数据表
AD548JRZ-REEL7	ROCHESTER	OP-AMP, 3000 uV OFFSET-MAX, 1 MHz BAND WIDTH, PDSO8, SOIC-8	获取价格
AD548K	ADI	Precision, Low Power BiFET Op Amp	获取价格
AD548KN	ROCHESTER	OP-AMP, 700uV OFFSET-MAX, 1MHz BAND WIDTH, PDIP8, MINI, PLASTIC, DIP-8	获取价格
AD548KN	ADI	Precision, Low Power BiFET Op Amp	获取价格
AD548KN/+	ETC	Operational Amplifier	获取价格
AD548KNZ	ADI	Precision, Low Power BiFET Op Amp	获取价格

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