Data Sheet
AD5381
Parameter
AD5381-31
Unit
Test Conditions/Comments
LOGIC OUTPUTS (
, SDO)3
BUSY
VOL, Output Low Voltage
VOH, Output High Voltage
High Impedance Leakage Current
High Impedance Output Capacitance
LOGIC OUTPUT (SDA)3
0.4
V max
V min
µA max
pF typ
Sinking 200 µA
Sourcing 200 µA
SDO only
DVDD – 0.5
1
5
SDO only
VOL, Output Low Voltage
0.4
0.6
1
V max
V max
µA max
pF typ
ISINK = 3 mA
ISINK = 6 mA
Three-State Leakage Current
Three-State Output Capacitance
POWER REQUIREMENTS
AVDD
8
2.7/3.6
2.7/5.5
V min/max
V min/max
DVDD
Power Supply Sensitivity3
∆Midscale/∆ΑVDD
AIDD
–85
0.375
0.475
1
dB typ
mA/channel max
mA/channel max
mA max
Outputs unloaded, boost off; 0.25 mA/channel typ
Outputs unloaded, boost on; 0.325 mA/channel typ
VIH = DVDD, VIL = DGND
DIDD
AIDD (Power-Down)
DIDD (Power-Down)
Power Dissipation
20
20
µA max
µA max
Typically 100 nA
Typically 1 µA
48
mW max
Outputs unloaded, boost off, AVDD = DVDD = 3 V
1 AD5381-3 is calibrated using an external 1.25 V reference. Temperature range is –40°C to +85°C.
2 Accuracy guaranteed from VOUT = 10 mV to AVDD – 50 mV.
3 Guaranteed by characterization, not production tested.
4 Default on the AD5381-3 is 1.25 V. Programmable to 2.5 V via CR10 in the AD5381 control register; operating the AD5381-3 with a 2.5 V reference will lead to degraded
accuracy specifications and limited input code range.
AC CHARACTERISTICS1
AVDD = 4.5 V to 5.5 V or 2.7 V to 3.6 V; DVDD = 2.7V to 5.5V; AGND = DGND = 0V.
Table 4.
Parameter
All
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE
Output Voltage Settling Time
1/4 scale to 3/4 scale change settling to 1 LSB
3
µs typ
8
µs max
V/µs typ
V/µs typ
nV-s typ
mV typ
Slew Rate 2
1.5
2.5
12
15
Boost mode off, CR9 = 0
Boost mode on, CR9 = 1
Digital-to-Analog Glitch Energy
Glitch Impulse Peak Amplitude
DAC-to-DAC Crosstalk
Digital Crosstalk
1
nV-s typ
nV-s typ
See Terminology section
0.8
0.1
15
40
Digital Feedthrough
Output Noise 0.1 Hz to 10 Hz
nV-s typ
µV p-p typ
µV p-p typ
Effect of input bus activity on DAC output under test
External reference, midscale loaded to DAC
Internal reference, midscale loaded to DAC
Output Noise Spectral Density
@ 1 kHz
@ 10 kHz
150
100
nV/√Hz typ
nV/√Hz typ
1 Guaranteed by design and characterization, not production tested.
2 Slew rate can be programmed via the current boost control bit in the AD5381 control register.
Rev. D | Page 7 of 40