AD5245
10 kΩ, 50 kΩ, 100 kΩ VERSIONS
VDD = 5 V 10ꢀ or 3 V 10ꢀ, VA = VDD, VB = 0 V, –40°C < TA < +125°C, unless otherwise noted.
Table 2.
Parameter
Symbol
Conditions
Min Typ1
Max
Unit
DC CHARACTERISTICS—RHEOSTAT MODE
Resistor Differential Nonlinearity2
Resistor Integral Nonlinearity2
Nominal Resistor Tolerance3
Resistance Temperature Coefficient
Wiper Resistance
R-DNL
R-INL
∆RAB
RWB, VA = no connect
RWB, VA = no connect
TA = 25°C
–1
–2
–30
0.1
0.25
+1
+2
+30
LSB
LSB
%
ppm/°C
Ω
(∆RAB/RAB)/∆T × 106 VAB = VDD, wiper = no connect
45
50
RW VDD = 5 V
120
DC CHARACTERISTICS—POTENTIOMETER DIVIDER MODE (Specifications Apply to All VRs)
Differential Nonlinearity4
Integral Nonlinearity4
DNL
INL
–1
–1
0.1
0.3
15
–1
1
+1
+1
LSB
LSB
ppm/°C
LSB
LSB
Voltage Divider Temperature Coefficient (∆VW/VW)/∆T × 106
Code = 0x80
Code = 0xFF
Code = 0x00
Full-Scale Error
Zero-Scale Error
RESISTOR TERMINALS
Voltage Range5
VWFSE
VWZSE
–3
0
0
3
VA, VB, VW
CA, CB
GND
VDD
V
pF
Capacitance A, B6
f = 1 MHz, measured to GND,
code = 0x80
f = 1 MHz, measured to GND,
code = 0x80
90
95
Capacitance W6
CW
pF
Shutdown Supply Current
Common-Mode Leakage
DIGITAL INPUTS AND OUTPUTS
Input Logic High
Input Logic Low
Input Logic High
Input Logic Low
Input Current
Input Capacitance6
IA_SD
ICM
VDD = 5.5 V
VA = VB = VDD/2
0.01
1
1
µA
nA
VIH
VIL
VIH
VIL
IIL
VDD = 5 V
VDD = 5 V
VDD = 3 V
VDD = 3 V
2.4
2.1
V
V
V
V
µA
pF
0.8
0.6
1
VIN = 0 V or 5 V
CIL
5
3
POWER SUPPLIES
Power Supply Range
Supply Current
Power Dissipationꢀ
VDD RANGE
IDD
PDISS
2.ꢀ
5.5
8
44
V
µA
µW
VIH = 5 V or VIL = 0 V
VIH = 5 V or VIL = 0 V, VDD = 5 V
Power Supply Sensitivity
PSS
VDD = 5 V 10%,
code = midscale
0.02
0.05 %/%
DYNAMIC CHARACTERISTICS6, 8
Bandwidth –3 dB
BW
RAB = 10 kΩ/50 kΩ/100 kΩ,
code = 0x80
VA = 1 V rms, VB = 0 V, f = 1 kHz,
RAB = 10 kΩ
VA = 5 V, VB = 0 V,
1 LSB error band
RWB = 5 kΩ, RS = 0
600/100/40
kHz
%
Total Harmonic Distortion
THDW
tS
0.1
2
VW Settling Time (10 kΩ/50 kΩ/100 kΩ)
Resistor Noise Voltage Density
µs
eN_WB
9
nV/√Hz
1 Typical specifications represent average readings at 25°C and VDD = 5 V.
2 Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.
3 VAB = VDD, wiper (VW) = no connect.
4 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.
DNL specification limits of 1 LSB maximum are guaranteed monotonic operating conditions.
5 Resistor Terminals A, B, W have no limitations on polarity with respect to each other.
6 Guaranteed by design and not subject to production test.
ꢀ PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
8 All dynamic characteristics use VDD = 5 V.
Rev. B | Page 4 of 20