Datasheet > AD5172EVAL1

AD5172EVAL1

更新时间： 2022-11-25 16:34:17

品牌	Logo	应用领域
亚德诺 - ADI		电位器
页数	文件大小	规格书
24页	1150K
描述
256-Position One-Time Programmable Dual-Channel I2C Digital Potentiometers

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AD5172EVAL1 数据手册

AD5172/AD5173

TIMING CHARACTERISTICS—2.5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ VERSIONS

Table 3. V_DD= 5 V ꢀ10 or 3V ꢀ10; V_A= V_DD; V_B= 1 V; –41°C < T_A< +ꢀ25°C; unless otherwise noted

Parameter Symbol Conditions

I²C INTERFACE TIMING CHARACTERISTICS¹(Specifications Apply to All Parts)

Min Typ Max Unit

SCL Clock Frequency

t_BUFBus Free Time between STOP and START

t_HD;STAHold Time (Repeated START)

f_SCL

t₁

t₂

4±±

kHz

µs

1.3

±.6

After this period, the first clock pulse is

generated.

t_LOWLow Period of SCL Clock

t_HIGHHigh Period of SCL Clock

t_SU;STASetup Time for Repeated START Condition

t_HD;DATData Hold Time²

t_SU;DATData Setup Time

t_FFall Time of Both SDA and SCL Signals

t_RRise Time of Both SDA and SCL Signals

t_SU;STOSetup Time for STOP Condition

t₃

t₄

t₅

t₆

t₇

t₈

t₉

t_1±

1.3

±.6

µs

±.9

1±±

±.6

3±±

¹See timing diagrams for locations of measured values.

²The maximum t_HD;DAThas only to be met if the device does not stretch the LOW period (t_LOW) of the SCL signal.

Rev. A | Page 5 of 24

1 2 3 456 7 8...24

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