AD5172/AD5173
Parameter
Symbol
Conditions
Min
Typ1
Max
Unit
VW Settling Time
tS
VA = 5 V, VB = ± V, ±1 LSB
error band
1
μs
Resistor Noise Voltage Density
eN_WB
RWB = 1.25 kΩ, RS = ± Ω
3.2
nV/√Hz
1 Typical specifications represent average readings at 25°C and VDD = 5 V.
2 Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from the ideal between successive tap positions. Parts are guaranteed monotonic.
3 VA = VDD, VB = ± V, wiper (VW) = no connect.
4 Specifications apply to all VRs.
5 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = ± V. DNL specification limits
of ±1 LSB maximum are guaranteed monotonic operating conditions.
6 Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.
7 Guaranteed by design, but not subject to production test.
8 Measured at Terminal A. Terminal A is open circuited in shutdown mode.
9 The minimum voltage requirement on the VIH is ±.7 V × VDD. For example, VIH minimum = 3.5 V when VDD = 5 V. It is typical for the SCL and SDA resistors to be pulled up to VDD
.
However, care must be taken to ensure that the minimum VIH is met when the SCL and SDA are driven directly from a low voltage logic controller without pull-up resistors.
1± Different from the operating power supply; the power supply for OTP is used one time only.
11 Different from the operating current; the supply current for OTP lasts approximately 4±± ms for one time only.
12 See Figure 3± for an energy plot during an OTP program.
13
P
is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
DISS
14 All dynamic characteristics use VDD = 5 V.
ELECTRICAL CHARACTERISTICS: 10 kΩ, 50 kΩ, AND 100 kΩ
VDD = 5 V 10% or 3 V 10%ꢀ VA = VDDꢀ VB = 0 Vꢀ −40°C < TA < +125°Cꢀ unless otherwise noted.
Table 2.
Parameter
Symbol
Conditions
Min
Typ1
Max
Unit
DC CHARACTERISTICS—RHEOSTAT MODE
Resistor Differential Nonlinearity2
Resistor Integral Nonlinearity2
Nominal Resistor Tolerance3
Resistance Temperature Coefficient
Wiper Resistance
R-DNL
R-INL
ΔRAB
(ΔRAB/RAB)/ΔT
RWB
RWB, VA = no connect
RWB, VA = no connect
TA = 25°C
−1
−2.5
−2±
±±.1
±±.25
+1
+2.5
+2±
LSB
LSB
%
ppm/°C
Ω
35
16±
Code = ±x±±, VDD = 5 V
2±±
DC CHARACTERISTICS—POTENTIOMETER DIVIDER
MODE4
Differential Nonlinearity5
Integral Nonlinearity5
Voltage Divider Temperature Coefficient
Full-Scale Error
DNL
INL
(ΔVW/VW)/ΔT
VWFSE
VWZSE
−1
−1
±±.1
±±.3
15
−1
1
+1
+1
LSB
LSB
ppm/°C
LSB
LSB
Code = ±x8±
Code = ±xFF
Code = ±x±±
−2.5
±
±
2.5
Zero-Scale Error
RESISTOR TERMINALS
Voltage Range6
VA, VB, VW
CA, CB
GND
VDD
V
pF
Capacitance A, B7
f = 1 MHz, measured to
GND, code = ±x8±
f = 1 MHz, measured to
GND, code = ±x8±
45
6±
Capacitance W7
CW
pF
Shutdown Supply Current8
Common-Mode Leakage
DIGITAL INPUTS AND OUTPUTS
SDA and SCL
IA_SD
ICM
VDD = 5.5 V
VA = VB = VDD/2
±.±1
1
1
μA
nA
Input Logic High9
Input Logic Low9
VIH
VIL
VDD = 5 V
VDD = 5 V
±.7 VDD
−±.5
VDD + ±.5
+±.3 VDD
V
V
AD± and AD1
Input Logic High
Input Logic Low
Input Current
Input Capacitance7
VIH
VIL
IIL
VDD = 3 V
VDD = 3 V
VIN = ± V or 5 V
2.1
V
V
μA
pF
±.6
±1
CIL
5
Rev. H | Page 4 of 24
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