Datasheet > AD50621

AD50621

更新时间： 2022-04-25 06:03:18

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
24页	617K
描述
Fully Accurate, 16-Bit, Unbuffered VOUT, Quad SPI Interface, 2.7 V to 5.5 V nanoDAC in a TSSOP

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AD50621 数据手册

AD5066

AC CHARACTERISTICS

V_DD= 2.7 V to 5.5 V, 2.0 V ≤ V_REFA, V_REFB, V_REFC, V_REFD ≤ V_DD− 0.4 V all specifications T_MINto T_MAX, unless otherwise noted.

Table 3.

Parameter^{1, 2}

Min Typ

Max Unit

Conditions/Comments³

DYNAMIC PERFORMACE

Output Voltage Settling Time

7.5

µs

¼ to ¾ scale settling to 2 LSB, single channel update, output

unloaded

¼ to ¾ scale settling to 2 LSB, all channel update, output

unloaded

Output Voltage Settling Time

Slew Rate

1.7

V/µs

nV-sec

Digital-to-Analog Glitch Impulse

Reference Feedthrough

Digital Feedthrough

Digital Crosstalk

1 LSB change around major carry

V_REF= 3 V 0.5 V p-p, frequency = 60 Hz to 20 MHz

−70

0.02

1.7

3.7

5.4

−83

Analog Crosstalk

DAC-to-DAC Crosstalk

Total Harmonic Distortion

Output Noise Spectral Density

V_REF= 3 V 0.2 V p-p, frequency = 10 kHz

nV/√Hz DAC code = 0x8000, 1 kHz

nV/√Hz DAC code = 0x8000, 10 kHz

Output Noise

4.7

μV p-p

0.1 Hz to 10 Hz

¹Temperature range is −40°C to +125°C, typical at +25°C.

²See the Terminology section.

³Guaranteed by design and characterization; not production tested.

Rev. A | Page 4 of 24

1 2 345 6 7...24

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