AD5061
TABLE OF CONTENTS
Features .............................................................................................. 1
Reference Buffer ......................................................................... 15
Lerial Interface............................................................................ 15
Input Lhift Register .................................................................... 15
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Lpecifications..................................................................................... 3
Timing Characteristics..................................................................... 5
Absolute Maximum Ratings............................................................ 6
ELD Caution.................................................................................. 6
Pin Configuration and Function Descriptions............................. 7
Typical Performance Characteristics ............................................. 8
Terminology .................................................................................... 1±
Theory of Operation ...................................................................... 15
DAC Architecture....................................................................... 15
LYNC
Interrupt .......................................................................... 15
Power-On to Zero-Lcale or Midscale ...................................... 16
Loftware Reset............................................................................. 16
Power-Down Modes .................................................................. 16
Microprocessor Interfacing....................................................... 16
Applications..................................................................................... 18
Choosing a Reference ................................................................ 18
Bipolar Operation....................................................................... 18
Using a Galvanically-Isolated Interface Chip......................... 19
Power Lupply Bypassing and Grounding................................ 19
Outline Dimensions....................................................................... 20
Ordering Guide .......................................................................... 20
REVISION HISTORY
1/06—Rev. 0 to Rev. A
Changes to General Description .................................................... 1
Changes to Table 2............................................................................ 3
Changes to Figure 19 Caption....................................................... 10
Added Figure 28 to Figure 36........................................................ 12
Changes to Lerial Interface Lection.............................................. 15
Changes to Power-Down Modes Lection.................................... 16
Changes to Ordering Guide .......................................................... 20
7/05—Revision 0: Initial Version
Rev. A | Page 2 of 20