Datasheet > AD1989BJCPZ-RL1

AD1989BJCPZ-RL1

更新时间： 2024-02-10 18:41:11

品牌	Logo	应用领域
亚德诺 - ADI		商用集成电路
页数	文件大小	规格书
20页	408K
描述
IC SPECIALTY CONSUMER CIRCUIT, QCC48, 7 X 7 MM, ROHS COMPLIANT, MO-220VKKD-2, LFCSP-48, Consumer IC:Other

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技术参数
数据手册

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AD1989BJCPZ-RL1 技术参数

生命周期：	Obsolete	零件包装代码：	QFN
包装说明：	HVQCCN,	针数：	48
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.37	商用集成电路类型：	CONSUMER CIRCUIT
JESD-30 代码：	S-XQCC-N48	长度：	7 mm
功能数量：	1	端子数量：	48
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	UNSPECIFIED	封装代码：	HVQCCN
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
认证状态：	Not Qualified	座面最大高度：	1 mm
最大供电电压 (Vsup)：	3.465 V	最小供电电压 (Vsup)：	3.135 V
表面贴装：	YES	温度等级：	COMMERCIAL
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	宽度：	7 mm
Base Number Matches：	1

AD1989BJCPZ-RL1 数据手册

AD1989B

SPECIFICATIONS

TEST CONDITIONS

Parameter

Test Condition

Temperature

25°C

Digital Supply

Analog Supply

MIC_BIAS_IN (via Low-Pass Filter)

Sample Rate f_S

3.3 V

5.0 V

48 kHz

Input Signal (Frequency Sine Wave) 1008 Hz

Amplitude for THD + N

Analog Output Pass Band

DAC

–3.0 dB Full Scale

20 Hz to 20 kHz

10 kΩ Output Load: Line-Out Tests

32 Ω Output Load: Headphone Tests

0 dB Gain

ADC

PERFORMANCE

Parameter

Min

Typ

Max

Unit

Line-Out Drive (10 kΩ loads—DAC to Pin)

Total Harmonic Distortion (THD + N)

Dynamic Range (–60 dB in ref to f_SA-Weighted)

Signal-to-Noise Ratio

–86

101

Headphone Drive (32 Ω loads—DAC to Pin)

Total Harmonic Distortion (THD + N)

Dynamic Range (–60 dB in ref to f_SA-Weighted)

Signal-to-Noise Ratio

–84

101

Input Ports (Mic Boost = 0 dB)

Total Harmonic Distortion (THD + N)

Dynamic Range (–60 dB in ref to f_SA-Weighted)

Signal-to-Noise Ratio

–80

GENERAL SPECIFICATIONS

Parameter

Min

Typ

Max

Unit

DIGITAL DECIMATION AND INTERPOLATION FILTERS—f_S= 8 kHz to 96 kHz¹

Pass Band

Pass-Band Ripple

Stop Band

Stop-Band Rejection

0.4 f_S

± 0.005

1/f_S

μs

0.6 f_S

–110

Group Delay

Group Delay Variation Over Pass Band

ANALOG-TO-DIGITAL CONVERTERS

Resolution

Bits

Gain Error (Full-Scale Span Relative to Nominal Input Voltage)²

Interchannel Gain Mismatch (Difference of Gain Errors)

ADC Offset Error¹

± 10

± 0.5

± 5

± 0.2

ADC Crosstalk¹

Line Inputs (Input L, Ground R, Read R; Input R, Ground L, Read L)

Line Inputs to Other

–94

–100

–80

DIGITAL-TO-ANALOG CONVERTERS

Resolution

Bits

Gain Error (Full-Scale Span Relative to Nominal Input Voltage)¹

Interchannel Gain Mismatch (Difference of Gain Errors)

DAC Crosstalk (Input L, Zero R, Measure R_OUT; Input R, Zero L, Measure L_OUT)¹

± 10

± 0.5

–104

Rev. 0

Page 4 of 20

August 2008

1 2 345 6 7...20

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