AD1865
ABSOLUTE MAXIMUM RATINGS*
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
VL to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 6.0 V
VS to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 6.0 V
–VS to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . –6.0 V to 0 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.3 V
Digital Inputs to DGND . . . . . . . . . . . . . . . . . . . . . –0.3 to VL
Short Circuit Protection . . . . . . . . Indefinite Short to Ground
Soldering (10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +300°C
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD1865 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
PINOUT
(24-Pin DIP Package)
ORDERING GUIDE
Temperature
Range
Package
THD+N @ FS Option*
+VS
–VS
Model
24
1
2
3
4
5
TRIM
23 TRIM
22 MSB
AD1865N
AD1865N-J
AD1865R
AD1865R-J
–25°C to +70°C
–25°C to +70°C
–25°C to +70°C
–25°C to +70°C
0.006%
0.004%
0.006%
0.004%
N-24A
N-24A
R-28
MSB
IOUT
RIGHT
CHANNEL
LEFT
CHANNEL
IOUT
21
R-28
AGND
AGND
20
*N = Plastic DIP, R = Small Outline IC Package.
AD1865
6
7
19 SJ
SJ
RF
TOP VIEW
PIN DESIGNATIONS
DIP SOIC
RF
18
17
16
(Not to Scale)
VOUT
+VL
DR
VOUT
NC
8
11 22
12 23
13 24
–VS
Negative Analog Supply
9
TRIM Right Channel Trim Network Connection
10
15 DL
MSB
IOUT
Right Channel Trim Potentiometer
Wiper Connection
Right Channel Output Current
LR 11
LL
14
14 26
15 28
16 11
17 12
18 13
19 14
10 15
11 16
12 17
13 18
14 19
15 10
12
CLK
13 DGND
AGND Analog Common Pin
SJ
Right Channel Amplifier Summing Junction
NC = NO CONNECT
RF
Right Channel Feedback Resistor
Right Channel Output Voltage
Positive Digital Supply
Right Channel Data Input Pin
Right Channel Latch Pin
Clock Input Pin
VOUT
+VL
DR
LR
(28-Pin SOIC Package)
SJ
1
2
28 AGND
27 NC
CLK
R
F
DGND Digital Common Pin
V
I
26
OUT
3
OUT
LL
DL
Left Channel Latch Pin
Left Channel Data Input Pin
No Internal Connection*
+V
4
25 NC
L
16 11, 16, 18 NC
25, 27
DR
24 MSB
5
LR
6
23 TRIM
–V
17 12
18 13
19 14
20 15
21 17
22 19
VOUT
Left Channel Output Voltage
AD1865
CLK
7
22
21
20
19
18
17
16
15
S
RF
SJ
Left Channel Feedback Resistor
Left Channel Amplifier Summing Junction
TOP VIEW
(Not to Scale)
+V
DGND
LL
8
S
AGND Analog Common Pin
9
TRIM
MSB
NC
IOUT
Left Channel Output Current
DL
NC
10
11
12
13
MSB
Left Channel Trim Potentiometer
Wiper Connection
V
I
23 20
24 21
TRIM Left Channel Trim Network Connection
+VS Positive Analog Supply
OUT
OUT
R
F
NC
AGND
*Pin 16 has no internal connection; –VL from AD1864 DIP socket can be safely
applied.
SJ 14
NC = NO CONNECT
REV. 0
–3–