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AD15452/PCB PDF预览

AD15452/PCB

更新时间: 2024-02-29 12:04:13
品牌 Logo 应用领域
亚德诺 - ADI 转换器
页数 文件大小 规格书
16页 344K
描述
12-Bit 65 MSPS Quad A/D Converter with Integrated Signal Conditioning

AD15452/PCB 技术参数

生命周期:Obsolete零件包装代码:BGA
包装说明:LBGA, BGA81,9X9,40针数:81
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.84
最大模拟输入电压:0.296 V最小模拟输入电压:
转换器类型:ADC, PROPRIETARY METHODJESD-30 代码:S-XBGA-B81
长度:10 mm模拟输入通道数量:1
位数:12功能数量:4
端子数量:81最高工作温度:85 °C
最低工作温度:-40 °C输出位码:OFFSET BINARY
输出格式:SERIAL封装主体材料:UNSPECIFIED
封装代码:LBGA封装等效代码:BGA81,9X9,40
封装形状:SQUARE封装形式:GRID ARRAY, LOW PROFILE
电源:3.3 V认证状态:Not Qualified
采样速率:65 MHz采样并保持/跟踪并保持:SAMPLE
座面最大高度:1.7 mm子类别:Analog to Digital Converters
标称供电电压:3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
宽度:10 mmBase Number Matches:1

AD15452/PCB 数据手册

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12-Bit 65 MSPS Quad A/D Converter with  
Integrated Signal Conditioning  
AD15452  
FEATURES  
PRODUCT HIGHLIGHTS  
12-bit, 65 MSPS, quad, analog-to-digital converter  
Differential input with 100 Ω input impedance  
Full-scale analog input: 296 mV p-p  
1. Quad, 12-bit, 65 MSPS, analog-to-digital converter with  
integrated analog signal conditioning optimized for antijam  
global positioning system receiver (AJ-GPS) applications.  
200 MHz, 3 dB bandwidth  
2. Packaged in a space saving 81-lead, 10 mm x 10 mm chip  
scale package ball grid array (CSP_BGA) and specified over  
the industrial temperature range (−40°C to +85°C).  
SNR @ −9 dBFS  
64 dBFS (70 MHz AIN)  
64 dBFS (140 MHz AIN)  
SFDR @ −9 dBFS  
81 dBFS (70 MHz AIN)  
73 dBFS (140 MHz AIN)  
475 mW per channel  
Quad LVDS outputs  
Data clock output provided  
Offset binary output data format  
GENERAL DESCRIPTION  
The AD15452 is a quad, 12-bit, 65 MSPS, analog-to-digital  
converter (ADC). It features a differential front-end  
amplification circuit followed by a sample-and-hold amplifier  
and multistage pipeline analog-to-digital converter. It is  
designed to operate with a 3.3 V analog supply and a 3.3 V  
digital supply. Each input is fully differential. The input signals  
are ac-coupled and terminated in 100 Ω input impedances. The  
full-scale differential signal input range is 296 mV p-p.  
APPLICATIONS  
Antijam GPS receivers  
Wireless and wired broadband communications  
Communications test equipment  
Four separate 12-bit digital output signals provide data flow  
from the ADCs. The digital output data is presented in offset  
binary format. A single-ended clock input is used to control all  
internal conversion cycles. The AD15452 is optimized for  
applications in antijam global positioning receivers and is suited  
for communications applications.  
FUNCTIONAL BLOCK DIAGRAM  
D+A  
D+C  
IN_A  
IN_C  
LPF  
LPF  
D–A  
D–C  
PDOWN  
CLK  
D+B  
D–B  
D+D  
D–D  
IN_B  
IN_D  
LPF  
LPF  
Figure 1.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
© 2005 Analog Devices, Inc. All rights reserved.  
 

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