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ADN2849ACP-RL7 PDF预览

ADN2849ACP-RL7

更新时间: 2024-02-03 09:45:01
品牌 Logo 应用领域
亚德诺 - ADI 驱动器驱动程序和接口接口集成电路
页数 文件大小 规格书
17页 1043K
描述
10.7 Gbps Electro-Absorption Modulator Driver

ADN2849ACP-RL7 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFN包装说明:HVQCCN, LCC24,.16SQ,20
针数:24Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.92Is Samacsys:N
接口集成电路类型:INTERFACE CIRCUITJESD-30 代码:S-PQCC-N24
JESD-609代码:e0长度:4 mm
标称负供电电压:-5.2 V功能数量:1
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装等效代码:LCC24,.16SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED电源:-5.2 V
认证状态:Not Qualified座面最大高度:1 mm
子类别:Display Drivers表面贴装:YES
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4 mmBase Number Matches:1

ADN2849ACP-RL7 数据手册

 浏览型号ADN2849ACP-RL7的Datasheet PDF文件第2页浏览型号ADN2849ACP-RL7的Datasheet PDF文件第3页浏览型号ADN2849ACP-RL7的Datasheet PDF文件第4页浏览型号ADN2849ACP-RL7的Datasheet PDF文件第5页浏览型号ADN2849ACP-RL7的Datasheet PDF文件第6页浏览型号ADN2849ACP-RL7的Datasheet PDF文件第7页 
10.7 Gbps Electro-Absorption Modulator Driver  
Preliminary Technical Data  
ADN2849  
FEATURES  
Data Rates up to 10.709Gb/s  
Typical Rise/Fall Time 27ps  
Power Dissipation 900mW (at 2V swing, 1V offset)  
Programmable Modulation Voltage up to 3V  
Programmable Bias Offset Voltage up to 2V  
Voltage-input control for offset, modulation  
Cross Point Adjust Range 30%- 85%  
Selectable Data Retiming  
PRODUCT DESCRIPTION  
The ADN2849 is a low power 10.7Gbps driver for electro-  
absorption modulator (EAM) applications. The modulation  
voltage is programmable via an external voltage up to a  
maximum swing of 3V when driving 50. The bias offset  
voltage and output eye cross point are also programmable. On-  
chip 50resistor is provided for back termination of the  
output. The ADN2849 is driven by AC coupled differential  
CML level data and has selectable data retiming to remove jitter  
from data input signal. The modulation voltage can be enabled  
or disabled by driving the MOD_ENB pin with the proper logic  
levels. It can operate with positive or negative (5.2V or 5.0V)  
supply voltage.  
PECL/CML Data & Clock Inputs  
50on Chip Data & Clock Terminations  
Modulation Ebnable/Disable  
|S11|<-10dB , |S22|<-8dB at 10GHz  
The ADN284949 is available in a compact 4x4mm plastic  
package or dice format.  
Positive or negative 5.2 or 5.0V single supply operation  
Available in dice and 4x4mm 24 Lead LFCSP package  
APPLICATIONS  
SONET OC-192 Optical Transmitters  
SDH STM-64 Optical Transmitters  
10Gb Ethernet IEEE802.3  
XFP/X2/XENPACK/MSA-300 Optical Modules  
CPAP CPAN MOD_SET  
BIAS_SET  
GND VTERM MODN_TERM  
GND  
ADN2849  
R
R
50  
DATAP  
50  
50  
MODP  
CROSS  
POINT  
ADJUST  
DATAN  
VBB  
MUX  
D
Q
CLKP  
50  
50  
CLKN  
VEE  
VEE  
CLK_SELB  
MOD_ENB  
Figure 1. Functional Block Diagram  
Rev. Pr. G August 2004  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.326.8703  
www.analog.com  
© 2004 Analog Devices, Inc. All rights reserved.  

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