ACS32201
LOW-POWER, HIGH-FIDELITY, CLASS-D AMPLIFIER
4.7.1. Audio Data Format Control Register ..................................................................................39
4.7.2. Audio Interface Output Tri-state .........................................................................................40
4.7.3. Audio Interface Control 3 Register .....................................................................................40
4.8. Bit Clock Mode .................................................................................................................................40
4.9. Control Interface ..............................................................................................................................41
4.9.1. Register Write Cycle ..........................................................................................................41
4.9.2. Multiple Write Cycle ...........................................................................................................42
4.9.3. Register Read Cycle ..........................................................................................................42
4.9.4. Multiple Read Cycle ...........................................................................................................42
4.9.5. Device Addressing and Identification .................................................................................43
5. AUDIO CLOCK GENERATION ............................................................................................... 44
5.1. Internal Clock Generation ................................................................................................................44
5.2. Clocking and Sample Rates ............................................................................................................44
6. CHARACTERISTICS ............................................................................................................... 46
6.1. Electrical Specifications ...................................................................................................................46
6.1.1. Absolute Maximum Ratings ...............................................................................................46
6.1.2. Recommended Operating Conditions ................................................................................46
6.2. Device Characteristics .....................................................................................................................47
6.3. Typical Power Consumption ............................................................................................................48
6.4. Low Power Mode Power Consumption ............................................................................................48
7. REGISTER MAP ...................................................................................................................... 49
8. PIN INFORMATION ................................................................................................................. 51
8.1. ACS32201 TAG Pinout ....................................................................................................................51
8.2. ACS32201 NAG Pin Diagram ..........................................................................................................52
8.3. ACS32201TAG Pin Tables ..............................................................................................................53
8.3.1. ACS32201TAG Power Pins ...............................................................................................53
8.3.2. ACS32201 TAG Reference Pins ........................................................................................53
8.3.3. ACS32201 TAG Analog Output Pins .................................................................................53
8.3.4. ACS32201 TAG Data and Control Pins .............................................................................54
8.3.5. ACS32201 TAG Clock Pins ...............................................................................................54
8.4. ACS32201 NAG Pin Tables .............................................................................................................55
8.4.1. ACS32201 NAG Power Pins ..............................................................................................55
8.4.2. ACS32201 NAG Reference Pins .......................................................................................55
8.4.3. ACS32201 NAG Analog Output Pins .................................................................................55
8.4.4. ACS32201 NAG Data and Control Pins .............................................................................56
8.4.5. ACS32201 NAG Clock Pins ...............................................................................................56
9. PACKAGE INFORMATION ..................................................................................................... 57
9.1. Package Drawing .............................................................................................................................57
9.2. Pb Free Process- Package Classification Reflow Temperatures ....................................................57
10. NAG/HLA PACKAGE INFORMATION ................................................................................. 58
10.1. NAG/HLA Package Drawing ..........................................................................................................58
10.2. Pb Free Process- Package Classification Reflow Temperatures ..................................................58
11. ORDERING INFORMATION ................................................................................................. 59
12. DISCLAIMER ......................................................................................................................... 59
13. DOCUMENT REVISION HISTORY ....................................................................................... 60
IDT CONFIDENTIAL
©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
3
V0.6 07/11
ACS32201
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