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ACS104A-PL

更新时间: 2024-02-07 03:49:57
品牌 Logo 应用领域
商升特 - SEMTECH 调制解调器光纤
页数 文件大小 规格书
12页 148K
描述
ACS104A Fiber Modem

ACS104A-PL 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:LQFP,针数:44
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84其他特性:FULL DUPLEX
数据速率:162 MbpsJESD-30 代码:S-PQFP-G44
长度:10 mm功能数量:1
端子数量:44最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE认证状态:Not Qualified
座面最大高度:1.6 mm标称供电电压:5 V
表面贴装:YES技术:CMOS
电信集成电路类型:MODEM温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD宽度:10 mm

ACS104A-PL 数据手册

 浏览型号ACS104A-PL的Datasheet PDF文件第1页浏览型号ACS104A-PL的Datasheet PDF文件第2页浏览型号ACS104A-PL的Datasheet PDF文件第4页浏览型号ACS104A-PL的Datasheet PDF文件第5页浏览型号ACS104A-PL的Datasheet PDF文件第6页浏览型号ACS104A-PL的Datasheet PDF文件第7页 
Advanced Communications  
ACS104A Data Sheet  
programmed using pins HD(1:2) on the TQFP44 package, in  
accordance with the Table 2.  
Local Loopback  
In local loopback mode TxD data is looped back inside the near-end  
modem and appears at its own RxD output. RTS, DTR and RII are  
also looped back appearing at their own CTS, DSR and RIO outputs  
respectively. The data is also sent to the far-end modem and  
synchronisation between the modems is maintained.  
HD2  
HD1  
Handshake  
Bandwidth  
Skew  
w.r.t. RxD  
0
0
1
1
0*  
1
0
600  
10  
5
Hz  
10 ms.  
kHz  
kHz  
kHz  
1 - 2 data bits  
1 - 2 data bits  
1 - 2 data bits  
In local loopback mode data received from the far-end device is  
ignored, except to maintain lock. If concurrent requests occur for  
local and remote loopback, local loopback is selected.  
1
2.5  
Table 2. Handshake signal bandwidth allocation  
* When HD2 = HD1 = 0 super-compress mode is selected. See  
section headed Super-Compress mode.  
The local loopback diagnostic mode is used to test data flow up to,  
and back from, the local ACS104A and does not test the integrity of  
the link itself, i.e. local loopback operates independently of  
synchronisation with a second modem.  
Handshake data rates which exceed the allocated bandwidth will  
be delayed, and consequently result in additional skew between  
handshake signals and data.  
Remote Loopback  
The HD pins enable the user to allocate a maximum bandwidth to  
the handshake signals and thus limit the power consumption of the  
device. The power consumption is, however, dependent on the  
actual bandwidth used and not the bandwidth selected. For  
example; if the handshake signals were toggled at 1kHz the power  
consumption would be the same for an allocated bandwidth of  
2.5kHz as it would for an allocation of 10kHz. See section headed  
Current and Power Consumption for more details.  
In remote loopback mode, the near-end modem sends a request to  
the far-end modem to loopback its received data, thus returning the  
data so that it appears at the RxD of the initiating modem. RTS,  
DTR and RII follows the same path, returning data back to CTS,  
DSR and RIO respectively of the initiating modem. Data also  
appears at the far-end modem outputs RxD, CTS, DSR and RIO. In  
the process both modems are exercised completely, as well as the  
LED/PINs and the fiber optic link. The remote loopback test is  
normally used to check the integrity of the entire link from the near-  
end (initiating) modem. Whilst a device is responding to a request  
for remote loopback from the initiating modem (far-end), requests to  
initiate remote loopback will be ignored.  
Super-Compress mode  
2
This mode is selected when HD2 = HD1 = 0. Super-compress  
mode performs a second stage of data compression, thus further  
reducing the power consumption of the modem. Normally, data is  
compressed in a manner which is independent of the data type. In  
super-compress mode, an additional stage of compression further  
reduces the data by a factor of 1 to 3 depending on the data itself.  
Drift lock  
Communicating modems attain a stable state where the 'transmit'  
window of one modem coincides with the 'receive' window of the  
other, allowing for delay through the optical link. Adjustments to  
machine cycles are made automatically during operation to  
compensate for differences in XTAL frequencies which would  
otherwise cause loss of synchronisation.  
Example: The super-compress stage will compress DC data by an  
additional Compression Factor (CF) of 3, whilst data close to the  
maximum frequency will not be compressed beyond the standard  
CF of 1.  
Using drift lock, synchronisation described above depends on a  
difference in the XTAL frequencies at each end of the link, and the  
greater the difference the faster the locking. Therefore, if the  
difference between XTAL frequencies is very small (a few ppm),  
automatic locking may take tens of seconds or even minutes.  
Super-compress mode provides benefits where the user is  
interested in low average power consumption (e.g. battery life)  
rather than peak power. If the intended system is idle for most of  
the time with periodic bursts of activity, the additional data  
compression afforded will approach a CF of 3.  
Drift lock will not operate if the two communicating devices are driven by  
a clock derived from a single source (i.e. tolerance of 0ppm).  
Locking  
Active Lock Mode  
To achieve low power consumption the ACS104A is active for a  
small percentage of the frame (machine-cycle) known as the  
'transmit' window and the 'receive' window, collectively these  
windows are known as the 'active time'. Outside the 'active time'  
the device is largely dormant accept for the maintenance of the  
oscillator and basic 'house-keeping' functions.  
Active lock mode may be used to accelerate synchronisation of a  
pair of communicating modems. This mode synchronises the  
modems in less than 3 seconds by adjusting the machine cycles of  
the modems. Active lock reduces the machine cycle of the device  
by 0.5 % ensuring rapid lock. After synchronisation the machine  
cycle reverts automatically to normal.  
Communicating modems attain a stable state known as 'locked',  
where the 'transmit' window of one modem coincides with the  
'receive' window of the other, allowing for the delay through the  
Only one device may be configured in active lock mode at any one  
time. Active lock mode is usually invoked temporarily on power-up.  
This can be achieved on the ACS104A by connecting DM1 to an RC  
arrangement, i.e. with the capacitor to 5V and the resistor to GND, to  
create a 5V à 0V ramp on power-up. The RC time constant should  
be Ca. 5 seconds. Active lock will succeed even when  
communicating devices are driven from clocks derived from a single  
source (0ppm).  
optical link.  
Adjustments to machine cycles are made  
automatically during operation, to compensate for differences in  
XTAL frequencies which cause loss of synchronisation.  
The ACS104A locking algorithm is statistical, and consequently the  
locking time will differ on each attempt to lock.  
Random Lock  
Diagnostic and Locking Modes  
This mode achieves moderate locking times (typically 5 seconds,  
worst case 10 seconds) with the advantage that the ACS104A’s are  
configured as peers. Communicating modems may be permanently  
configured in this mode by hard wiring the DM pins.  
The diagnostic and operational modes, shown in Table 3, are  
selected using the DM pins. DM3 is held high internally on the  
PLCC28 package.  
DM3  
DM2  
DM1  
Mode  
Lock  
Random lock will succeed even when communicating devices are  
driven from clocks derived from a single source (0ppm). Random  
lock mode is compatible with drift lock and active lock.  
0
0
0
1
1
1
0
0
1
0
1
1
0
1
0
1
0
1
Full-duplex  
Full-duplex  
Full-duplex  
Local loopback  
Remote loopback  
Full-duplex  
Drift  
Active  
Memory  
Random  
Random  
Random  
Memory Lock  
Following the assertion of a reset (PORB = 0) communicating  
devices will initiate an arbitration process where within 10 seconds  
Table 3. Diagnostic and operational modes  
3

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