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A6265 PDF预览

A6265

更新时间: 2024-01-30 08:28:41
品牌 Logo 应用领域
急速微 - ALLEGRO 转换器驱动控制器
页数 文件大小 规格书
17页 349K
描述
The A6265 is a DC-to-DC converter controller, providing a programmable constant current output for driving high power LEDs in series.

A6265 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP-16针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:8
Is Samacsys:N接口集成电路类型:LED DISPLAY DRIVER
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:5 mm湿度敏感等级:2
复用显示功能:NO功能数量:1
区段数:15端子数量:16
最高工作温度:150 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:HTSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, HEAT SINK/SLUG, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:8/40 V认证状态:Not Qualified
筛选级别:AEC-Q100座面最大高度:1.2 mm
子类别:Display Drivers最大供电电压:50 V
最小供电电压:6.5 V表面贴装:YES
温度等级:AUTOMOTIVE端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

A6265 数据手册

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A6265  
Automotive High Current LED Controller  
Functional Description  
The A6265 is a DC-DC converter controller that is designed to  
drive series-connected high power LEDs in automotive applica-  
tions. It provides programmable constant current output at load  
voltages and currents limited only by the external components.  
For automotive applications optimum performance is achieved  
when driving between two and ten LEDs at currents up to 1 A.  
source of the PMOS FET used to isolate the load from the supply.  
Table 1 defines when FF1 is active. If FF1 is pulled low when  
an output short fault is indicated then the output disable will be  
overridden.  
FF2 Fault Flag output. Open drain output, when high impedance  
indicates detection of a circuit fault. An external pull-up resistor  
should be connected to a suitable logic supply. If VREG is not  
used, then the logic supply should not be pulled 300 mV above  
The A6265 can be configured as a standard boost converter or  
as a supply referenced boost converter. In the supply referenced  
configuration the load voltage is the difference between the boost VREG. Table 1 defines when FF2 is active. If FF2 is pulled low  
voltage and the supply voltage. This difference can be greater  
than, equal to, or less than the supply voltage, effectively provid-  
ing a buck-boost capability. This configuration provides seam-  
less, uninterrupted operation over the wide supply voltage range  
possible in automotive applications and, because the output is ref-  
erenced to the positive supply, there is no load current to ground.  
This ensures that there is no leakage path through the LEDs when  
in shutdown and no inrush current at power-up.  
when an open LED fault is indicated then the output disable will  
be overridden.  
OSC Resistor to ground to set the internal oscillator or clock  
input from external oscillator. When connected to VREG the  
oscillator runs at typically 350 kHz. Higher accuracy in the  
frequency is possible by connecting a resistor from this pin to  
ground or by driving this pin with an external precision oscillator.  
CKOUT Logic output at the oscillator frequency with phase  
shift. Used to drive succeeding controllers to interleave switching  
instants.  
The A6265 integrates all necessary control elements to pro-  
vide a cost-effective solution using a single external logic-level  
MOSFET and minimum additional external passive components.  
IREF LED current reference modifier. A voltage input that can be  
used to reduce the LED current sense voltage. When connected to  
VREG, the current sense voltage, VIDL, and the value of the sense  
resistor, RSL, define the maximum LED current.  
The LED current is set by selecting an appropriate value for the  
sense resistor value and using the EN input to provide simple  
on-off control or for PWM brightness control using a suitable  
externally generated PWM signal. The LED current can be  
reduced in a single step by reducing the voltage between the  
IREF pin and GND to less than 1 V.  
SG Gate drive for external logic-level MOSFET low-side switch  
that connects the inductor to ground.  
The pin functions and circuit operation are described in detail in  
the following sections.  
SP, SN Sense amplifier connections for switch current limit  
sense resistor, RSS  
.
Pin Functions  
VIN Supply to the control circuit. A bypass capacitor must be  
connected between this pin and GND.  
LP Positive sense amplifier connection for LED current limit  
sense resistor, RSL. This pin is also the bias supply for the LED  
current sense amplifier.  
GND Ground reference connection. This pin should be connected LN Negative sense amplifier connection for LED current limit  
directly to the negative supply.  
sense resistor, RSL. The voltage at LN also determines whether  
the boost or buck-boost mode is configured.  
EN Logic input to enable operation. Can be used as direct PWM  
input. Chip enters low power sleep mode when low for longer  
VREG Compensation capacitor for internal 5 V regulator.  
than the disable time, tDIS  
.
LA Anode reference connection to LEDs. Using an external resis-  
FF1 Fault Flag output and isolation control. Open drain current  
tor divider with the same ratio as the number of LEDs provides  
sink output, when high impedance indicates detection of a critical a measurement of the voltage across all LEDs in the load. This  
circuit fault. An external pull-up resistor should be connected to a is compared to the voltage on the LF pin to provide shorted LED  
suitable logic supply for simple logic fault flag operation or to the detection. In addition, it is compared against voltage references to  
Allegro MicroSystems, Inc.  
115 Northeast Cutoff  
7
Worcester, Massachusetts 01615-0036 U.S.A.  
1.508.853.5000; www.allegromicro.com  

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