Datasheet > A625308R-70L

A625308R-70L

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
联笙电子 - AMICC		静态存储器
页数	文件大小	规格书
13页	126K
描述
32K X 8 BIT CMOS SRAM

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A625308R-70L 数据手册

A625308 Series

Preliminary

32K X 8 BIT CMOS SRAM

Features

nExternal Operating Voltage: 4.5V to 5.5V

nAccess times: 70 ns (max.)

nCurrent:

nFull static operation, no clock or refreshing required

nAll inputs and outputs are directly TTL compatible

nCommon I/O using three-state output

nData retention voltage: 2.0V (min.)

A625308-L series:

Operating: 70mA(max.)

nAvailable in 28-pin SOP and TSOP (forward and

reverse type) packages

Standby: 100mA(max.)

Operating: 70mA (max.)

Standby: 25mA (max.)

A625308-S series:

General Description

The A625308 is a low operating current 262,144-bit

static random access memory organized as 32,768

words by 8 bits and operates on a single 5V power

supply.

Inputs and three-state outputs are TTL compatible and

allow for direct interfacing with common system bus

structures.

Minimum standby power is drawn by this device when

CE is at a high level, independent of the other input

levels.

Data retention is guaranteed at a power supply voltage

as low as 2.0V.

Pin Configurations

nSOP

nTSOP

VCC

A14

A12

A11

A10

I/O7

I/O6

I/O₅

I/O4

I/O₃

VSS

I/O₂

I/O₁

I/O₀

A13

VCC

A14

A12

A625308V

A11

A10

I/O₇

I/O₀

I/O1

I/O2

I/O6

I/O5

I/O₄

I/O3

A12

A14

VCC

A13

A11

GND

I/O₀

I/O1

I/O2

VSS

I/O3

I/O4

I/O5

I/O6

I/O7

A625308R

A10

PRELIMINARY

(December, 2000, Version 0.2)

AMIC Technology, Inc.

123 4 5 6 7...13

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