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A49FL004TL-33F PDF预览

A49FL004TL-33F

更新时间: 2024-02-21 07:19:49
品牌 Logo 应用领域
联笙电子 - AMICC 闪存PC
页数 文件大小 规格书
36页 714K
描述
4 Mbit CMOS 3.3Volt-only Firmware Hub/LPC Flash Memory

A49FL004TL-33F 数据手册

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A49FL004  
4 Mbit CMOS 3.3Volt-only Firmware Hub/LPC Flash Memory  
Preliminary  
FEATURES  
• Single Power Supply Operation  
Low voltage range: 3.0 V - 3.6 V  
• Standard Intel Firmware Hub/LPC Interface  
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Standard SDP Command Set  
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Data Polling and Toggle Bit features  
Block Locking Register for all blocks  
Register-based read and write protection for  
each block  
4 ID pins for multiple chips selection  
5 GPI pins for General Purpose Input Register  
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Read compatible to Intel® 82802 Firmware  
Hub devices  
Conforms to Intel LPC Interface Specification  
Revision 1.1  
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• Memory Configuration  
512K x 8 (4 Mbit)  
Block Architecture  
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TBL pin for hardware write protection to Boot Block  
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WP pin for hardware write protection to whole memory  
array except Boot Block  
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Uniform 4 KBytes Sectors  
Uniform 64 KByte overlay blocks  
Support full chip erase for Address/Address  
Multiplexed (A/A Mux) mode  
• Address/Address Multiplexed (A/A Mux) Mode  
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11-pin multiplexed address and 8-pin data I/O interface  
Supports fast programming on EPROM programmers  
Standard SDP Command Set  
Automatic Erase and Program Operation  
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Build-in automatic program verification for extended  
product endurance  
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Data Polling and Toggle Bit features  
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Typical 10 µs/byte programming time  
Typical x s sector erase time  
Typical y s block erase time  
• Lower Power Consumption  
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Typical 12mA active read current  
Typical 17mA program/erase current  
Typical z s chip erase time  
High Product Endurance  
• Two Configurable Interfaces  
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Guarantee 100,000 program/erase cycles per single  
sector (preliminary)  
Minimum 20 years data retention  
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In-System hardware interface: Auto detection of  
Firmware Hub (FWH) or Low Pin Count (LPC)  
Interface for in-system read and write operations  
Address/Address Multiplexed (A/A Mux) Interface for  
programming on EPROM Programmers during  
manufacturing  
• Compatible Pin-out and Packaging  
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32-pin (8 mm x 14 mm) TSOP  
32-pin PLCC  
Optional lead-free (Pb-free) package  
• Firmware Hub (FWH)/Low Pin Count (LPC) Mode  
• Hardware Data Protection  
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33 MHz synchronous operation with PCI bus  
5-signal communication interface for in-system read  
and write operations  
PRELIMINARY  
(September, 2005, Version 0.0)  
1
AMIC Technology, Corp.  

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