A4982
DMOS Microstepping Driver with Translator
And Overcurrent Protection
Features and Benefits
▪ Low RDS(ON) outputs
Description
The A4982 is a complete microstepping motor driver with
▪ Automatic current decay mode detection/selection
▪ Mixed and Slow current decay modes
▪ Synchronous rectification for low power dissipation
▪ Internal UVLO
built-in translator for easy operation. It is designed to operate
bipolarsteppermotorsinfull-,half-,quarter-,andsixteenth-step
modes, with an output drive capacity of up to 35 V and ±2 A.
The A4982 includes a fixed off-time current regulator which
has the ability to operate in Slow or Mixed decay modes.
▪ Crossover-current protection
▪ 3.3 and 5 V compatible logic supply
▪ Thin profile QFN and TSSOP packages
▪ Thermal shutdown circuitry
▪ Short-to-ground protection
▪ Shorted load protection
The ET package meets customer requirements for no smoke
no fire (NSNF) designs by adding no-connect pins between
critical output, sense, and supply pins. So, in the case of a
pin-to-adjacent-pin short, the device does not cause smoke
or fire. Additionally, the device does not cause smoke or fire
when any pin is shorted to ground or left open.
▪ Low current Sleep mode, < 10 μA
▪ No smoke no fire (NSNF) compliance (ET package)
The translator is the key to the easy implementation of the
A4982. Simply inputting one pulse on the STEP input drives
the motor one microstep. There are no phase sequence tables,
highfrequencycontrollines,orcomplexinterfacestoprogram.
The A4982 interface is an ideal fit for applications where a
complex microprocessor is unavailable or is overburdened.
Packages:
32-contact QFN
with exposed thermal pad
5 mm × 5 mm × 0.90 mm
Approximate size
(ET package)
During stepping operation, the chopping control in theA4982
automatically selects the current decay mode, Slow or Mixed.
In Mixed decay mode, the device is set initially to a fast decay
for a proportion of the fixed off-time, then to a slow decay for
the remainder of the off-time. Mixed decay current control
24-pin TSSOP
with exposed thermal pad
(LP Package)
Continued on the next page…
Typical Application Diagram
VDD
0.1 μF
0.1 μF
0.22 μF
VREG ROSC CP1
VDD
CP2 VCP
VBB1
0.22 μF
100 μF
VBB2
5 kΩ
Microcontroller or
Controller Logic
SLEEP
STEP
OUT1A
A4982
OUT1B
SENSE1
MS1
MS2
DIR
OUT2A
ENABLE
RESET
OUT2B
SENSE2
VREF
GND
GND
4982-DS Rev. 4