A43L2616B
Decoupling Capacitance Guide Line
Recommended decoupling capacitance added to power line at board.
Parameter
Symbol
Value
Unit
μF
Decoupling Capacitance between VDD and VSS
Decoupling Capacitance between VDDQ and VSSQ
CDC1
CDC2
0.1 + 0.01
0.1 + 0.01
μF
Note: 1. VDD and VDDQ pins are separated each other.
All VDD pins are connected in chip. All VDDQ pins are connected in chip.
2. VSS and VSSQ pins are separated each other
All VSS pins are connected in chip. All VSSQ pins are connected in chip.
DC Electrical Characteristics
(Recommended operating condition unless otherwise noted, TA = 0°C to 70°C TA = -40ºC to +85ºC)
Speed
Symbol
Parameter
Test Conditions
Unit Notes
-6
-7
Operating Current
(One Bank Active)
Burst Length = 1
Icc1
70
70
mA
mA
1
tRC ≥ tRC(min), tCC ≥ tCC(min), IOL = 0mA
Icc2 P
CKE ≤ VIL(max), tCC = 15ns
2
1
Precharge Standby Current
in power-down mode
Icc2 PS
CKE ≤ VIL(max), tCC = ∞
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 15ns
ICC2N
20
15
Precharge Standby Current
in non power-down mode
Input signals are changed one time during 30ns
mA
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable.
ICC2NS
Active Standby current in
non power-down mode
(One Bank Active)
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 15ns
Input signals are changed one time during 30ns
ICC3N
ICC4
30
mA
mA
Operating Current
(Burst Mode)
IOL = 0mA, Page Burst
All bank Activated, tCCD = tCCD (min)
100
130
100
130
1
2
ICC5
ICC6
Refresh Current
mA
mA
tRC ≥ tRC (min)
CKE ≤ 0.2V
Self Refresh Current
1.5
Note: 1. Measured with outputs open. Addresses are changed only one time during tCC(min).
2. Refresh period is 64ms. Addresses are changed only one time during tCC(min).
(December, 2009, Version 1.3)
5
AMIC Technology, Corp.