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A3985SLDTR-T PDF预览

A3985SLDTR-T

更新时间: 2024-01-09 07:08:24
品牌 Logo 应用领域
急速微 - ALLEGRO 驱动器
页数 文件大小 规格书
15页 447K
描述
Digitally Programmable Dual Full-Bridge MOSFET Driver

A3985SLDTR-T 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP,针数:38
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.56
高边驱动器:YES接口集成电路类型:FULL BRIDGE BASED MOSFET DRIVER
JESD-30 代码:R-PDSO-G38JESD-609代码:e3
长度:9.7 mm湿度敏感等级:2
功能数量:1端子数量:38
最高工作温度:85 °C最低工作温度:-20 °C
标称输出峰值电流:0.2 A封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压:5.5 V最小供电电压:3 V
标称供电电压:5 V电源电压1-最大:50 V
电源电压1-分钟:12 V表面贴装:YES
温度等级:OTHER端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:4.4 mmBase Number Matches:1

A3985SLDTR-T 数据手册

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A3985  
Digitally Programmable  
Dual Full-Bridge MOSFET Driver  
Features and Benefits  
Description  
Serial interface for full digital control  
Dual full-bridge gate drive for N-channel MOSFETs  
Dual 6-bit DAC current reference  
Operation over 12 to 50 V supply voltage range  
Synchronous rectification  
The A3985 is a flexible dual full-bridge gate driver suitable  
for driving a wide range of higher power industrial bipolar 2-  
phase stepper motors or 2-phase brushless dc motors. It can  
also be used to drive two individual torque motors or solenoid  
actuators.MotorpowerisprovidedbyexternalN-channelpower  
MOSFETs at supply voltages from 12 to 50 V.  
Cross-conduction protection  
Adjustable mixed decay  
Fixed off-time PWM current control  
Low-current idle mode  
Full digital control is provided by two serially-accessible  
registers that allow programming of off-time, blank-time,  
dead-time, mixed decay ratios, synchronous rectification,  
master clock source selection, and division ratio and idle  
mode. All internal timings are derived from a master clock  
that can be generated on-chip or provided by an external  
clock such as the system clock of the master controller. A  
programmable divider allows for a wide range of external  
system clock frequencies.  
Package: 38 pin TSSOP (suffix LD)  
The internal fixed off-time PWM current-control timing is  
programmed via the serial interface to operate in slow, fast,  
andmixedcurrent-decaymodes.Thedesiredload-currentlevel  
and direction is set via the serial port with a direction bit and  
two 6-bit linear DACs in conjunction with a reference voltage.  
The seven bits of control allow maximum flexibility in torque  
Continued on the next page…  
Approximate size  
Typical Application  
3985-DS  

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