Datasheet > A3983_08

A3983_08

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
急速微 - ALLEGRO		驱动器
页数	文件大小	规格书
11页	450K
描述
DMOS Microstepping Driver with Translator

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A3983_08 数据手册

A3983

DMOS Microstepping Driver with Translator

Features and Benefits

▪ Low R_DS(ON)outputs

Description

The A3983 is a complete microstepping motor driver with

▪ Automatic current decay mode detection/selection

▪ Mixed and Slow current decay modes

▪ Synchronous rectification for low power dissipation

▪ Internal UVLO and thermal shutdown circuitry

▪ Crossover-current protection

built-in translator for easy operation. It is designed to operate

bipolar stepper motors in full-, half-, quarter-, and eighth-step

modes, with an output drive capacity of up to 35 V and ±2 A.

The A3983 includes a fixed off-time current regulator which

has the ability to operate in Slow or Mixed decay modes.

The translator is the key to the easy implementation of the

A3983. Simply inputting one pulse on the STEP input drives

the motor one microstep. There are no phase sequence tables,

highfrequencycontrollines,orcomplexinterfacestoprogram.

The A3983 interface is an ideal fit for applications where a

complex microprocessor is unavailable or is overburdened.

Package: 24-pin TSSOP with exposed thermal pad

(suffix LP)

The chopping control in the A3983 automatically selects the

current decay mode (Slow or Mixed). When a signal occurs at

the STEP input pin, the A3983 determines if that step results

in a higher or lower current in each of the motor phases. If

the change is to a higher current, then the decay mode is set to

Slow decay. If the change is to a lower current, then the current

decay is set to Mixed (set initially to a fast decay for a period

amounting to 31.25% of the fixed off-time, then to a slow

decay for the remainder of the off-time). This current decay

Not to scale

Continued on the next page…

Functional Block Diagram

0.1 μF

CP2

0.22 μF

CP1

VREG

ROSC

VDD

REF

Current

Regulator

Charge

Pump

OSC

VCP

0.1 μF

DMOS Full Bridge

VBB1

DAC

OUT1A

OUT1B

PWM Latch

Blanking

Mixed Decay

SENSE1

VBB2

STEP

DIR

Gate

Drive

R_S1

DMOS Full Bridge

RESET

Control

Logic

Translator

MS1

MS2

OUT2A

OUT2B

PWM Latch

Blanking

Mixed Decay

ENABLE

SLEEP

SENSE2

R_S2

DAC

V_REF

26184.29B

12 3 4 5 6 7...11

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