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A3974

更新时间： 2024-02-29 12:55:19
品牌 Logo 应用领域
急速微 - ALLEGRO 驱动器
页数 文件大小 规格书
12页 159K
描述
DMOS DUAL FULL-BRIDGE PWM MOTOR DRIVER

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A3974 技术参数

是否Rohs认证：不符合生命周期：Obsolete
零件包装代码：LCC包装说明：QCCJ, LDCC44,.7SQ
针数：44Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.89Is Samacsys：N
模拟集成电路 - 其他类型：STEPPER MOTOR CONTROLLERJESD-30 代码：S-PQCC-J44
长度：16.585 mm湿度敏感等级：1
功能数量：2端子数量：44
最高工作温度：85 °C最低工作温度：-20 °C
最大输出电流：1.5 A封装主体材料：PLASTIC/EPOXY
封装代码：QCCJ封装等效代码：LDCC44,.7SQ
封装形状：SQUARE封装形式：CHIP CARRIER
峰值回流温度（摄氏度）：225电源：5 V
认证状态：Not Qualified座面最大高度：4.57 mm
子类别：Motion Control Electronics最大供电电流 (Isup)：10 mA
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
温度等级：OTHER端子形式：J BEND
端子节距：1.27 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：16.585 mm
Base Number Matches：1

A3974 数据手册

 浏览型号A3974的Datasheet PDF文件第2页浏览型号A3974的Datasheet PDF文件第3页浏览型号A3974的Datasheet PDF文件第4页浏览型号A3974的Datasheet PDF文件第6页浏览型号A3974的Datasheet PDF文件第7页浏览型号A3974的Datasheet PDF文件第8页 
3974  
DMOS DUAL FULL-BRIDGE  
PWM MOTOR DRIVER  
FUNCTIONAL DESCRIPTION  
Serial Interface. The A3974SED is controlled via a 3-wire  
(clock, data,strobe) serial port. The programmable functions  
allow maximum flexibility in configuring the PWM to the  
motor drive requirements. The serial data is written as two 20-  
bit words: 1 bit to select the word and 19 bits of data. The data  
is clocked in starting with D19.  
D2 – D6 Fixed Off Time. This five-bit word sets the fixed  
off-time for the internal PWM control circuitry. The off-time is  
defined by  
toff =(8 [1 + N]/fOSC) - 1/fOSC  
where N = 0 .... 31  
For example, with an oscillator frequency of 4 MHz, the  
fixed off-time will be adjustable from 1.75 µs to 63.75 µs in  
increments of 2 µs.  
Word 0 Bit Assignments  
Select Word 0 (D18 = 0)  
Bit  
Function  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
Bridge 1 blank time LSB  
Bridge 1 blank time MSB  
Bridge 1 off-time LSB  
Bridge 1 off-time bit 1  
Bridge 1 off-time bit 2  
Bridge 1 off-time bit 3  
Bridge 1 off-time MSB  
Bridge 1 fast-decay time bit LSB  
Bridge 1 fast-decay time bit 1  
Bridge 1 fast-decay time bit 2  
Bridge 1 fast-decay time MSB  
Bridge 1 sync. rect. control  
Bridge 1 sync. rect. control  
Bridge 1 external PWM mode  
Bridge 1 enable  
D7 – D10 Fast Decay Time. This four-bit word sets the fast-  
decay portion of the fixed off-time for the internal PWM control  
circuitry. This will only have impact if mixed-decay mode is  
selected (via bit D17). For tfd > toff, the device will effectively  
operate in fast-decay mode. The fast-decay portion is defined  
by  
tfd = (8[1 + N]/fOSC] - 1/fOSC  
where N = 0 .... 15  
D8  
D9  
For example, with an oscillator frequency of 4 MHz, the fast-  
decay time will be adjustable from 1.75 µs to 31.75 µs in  
increments of 2 µs.  
D10  
D11  
D12  
D13  
D14  
D15  
D16  
D17  
D18  
D19  
D11 – D12 Synchronous Rectification.  
Bridge 1 phase  
D12  
0
D11  
0
Synchronous Rectifier  
Disabled  
Bridge 1 reference range select  
Bridge 1 internal PWM mode  
Word select = 0  
0
1
1
0
Low side only  
Active  
Test mode  
1
1
Passive  
D0 – D1 Blank Time. The current-sense comparator is  
blanked when any output driver is switched on, according to the  
table below. fosc is the oscillator input frequency.  
The different modes of operation are described in the synchro-  
nous rectification section of the functional description.  
D13 External PWM Decay Mode. This bit determines the  
current-decay mode when using ENABLE chopping for  
external PWM current control.  
D1  
0
0
D0  
0
1
Blank Time  
4/fOSC  
6/fOSC  
1
1
0
1
12/fOSC  
24/fOSC  
D13  
Mode  
0
1
Fast  
Slow  
continued next page ...  
www.allegromicro.com  
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