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A29L040X PDF预览

A29L040X

更新时间: 2022-04-11 09:51:39
品牌 Logo 应用领域
联笙电子 - AMICC /
页数 文件大小 规格书
30页 350K
描述
512K X 8 Bit CMOS 3.0 Volt-only, Uniform Sector Flash Memory

A29L040X 数据手册

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A29L040 Series  
512K X 8 Bit CMOS 3.0 Volt-only,  
Uniform Sector Flash Memory  
Features  
„ Single power supply operation  
- Embedded Program algorithm automatically writes and  
verifies bytes at specified addresses  
„ Minimum 100,000 program/erase cycles per sector  
„ 20-year data retention at 125°C  
- Reliable operation for the life of the system  
„ Compatible with JEDEC-standards  
- Full voltage range: 2.7 to 3.6 volt read and write  
operations for battery-powered applications  
- Regulated voltage range: 3.0 to 3.6 volt read and write  
operations for compatibility with high performance 3.3  
volt microprocessors  
„ Access times:  
- -55(Vcc: 3.0 ~ 3.6V) / -70 (max.)  
„ Current:  
- Pinout and software compatible with single-power-  
supply Flash memory standard  
- Superior inadvertent write protection  
- 4 mA typical active read current  
„
Polling and toggle bits  
- Provides a software method of detecting completion of  
program or erase operations  
Data  
- 20 mA typical program/erase current  
- 1 nA typical CMOS standby current  
„ Flexible sector architecture  
„ Erase Suspend/Erase Resume  
- 8 uniform sectors of 64 Kbyte each  
- Any combination of sectors can be erased  
- Supports full chip erase  
- Suspends a sector erase operation to read data from,  
or program data to, a non-erasing sector, then  
resumes the erase operation  
- Sector protection:  
„ Package options  
A hardware method of protecting sectors to prevent  
any inadvertent program or erase operations within that  
sector  
- 32-pin DIP, PLCC, TSOP (8mm x 20mm), sTSOP  
(8mm x 13.4mm), sTSOP (8mm x 14mm)  
- All Pb-free (Lead-free) products are RoHS compliant  
„ Embedded Erase Algorithms  
- Embedded Erase algorithm will automatically erase the  
entire chip or any combination of designated sectors  
and verify the erased sectors  
General Description  
serve as input to an internal state-machine that controls the  
erase and programming circuitry. Write cycles also internally  
latch addresses and data needed for the programming and  
erase operations. Reading data out of the device is similar to  
reading from other Flash or EPROM devices.  
Device programming occurs by writing the proper program  
command sequence. This initiates the Embedded Program  
algorithm - an internal algorithm that automatically times the  
program pulse widths and verifies proper program margin.  
Device erasure occurs by executing the proper erase  
command sequence. This initiates the Embedded Erase  
The A29L040 is a 3.0 volt-only Flash memory organized as  
524,288 bytes of 8 bits each. The 512 Kbytes of data are  
further divided into eight sectors of 64 Kbytes each for  
flexible sector erase capability. The 8 bits of data appear on  
I/O0 - I/O7 while the addresses are input on A0 to A18. The  
A29L040 is offered in 32-pin PLCC, TSOP (8mm x 20mm) or  
sTSOP (8mm x 13.4mm) packages. This device is designed  
to be programmed in-system with the standard system 3.0  
volt VCC supply. Additional 12.0 volt VPP is not required for  
in-system write or erase operations. However, the A29L040  
can also be programmed in standard EPROM programmers.  
The A29L040 has a second toggle bit, I/O2, to indicate  
whether the addressed sector is being selected for erase,  
and also offers the ability to program in the Erase Suspend  
mode. The standard A29L040 offers access times of 70ns,  
allowing high-speed microprocessors to operate without wait  
states. To eliminate bus contention the device has separate  
algorithm  
-
an internal algorithm that automatically  
preprograms the array (if it is not already programmed)  
before executing the erase operation. During erase, the  
device automatically times the erase pulse widths and  
verifies proper erase margin.  
The host system can detect whether a program or erase  
chip enable (  
), write enable (  
) and output enable  
WE  
CE  
operation is complete by reading the I/O7 (  
Polling) and  
Data  
I/O6 (toggle) status bits. After a program or erase cycle has  
been completed, the device is ready to read array data or  
accept another command.  
The sector erase architecture allows memory sectors to be  
erased and reprogrammed without affecting the data  
contents of other sectors. The A29L040 is fully erased when  
shipped from the factory.  
(
) controls.  
OE  
The device requires only a single 3.0 volt power supply for  
both read and write functions. Internally generated and  
regulated voltages are provided for the program and erase  
operations.  
The A29L040 is entirely software command set compatible  
with the JEDEC single-power-supply Flash standard.  
Commands are written to the command register using  
standard microprocessor write timings. Register contents  
The hardware sector protection feature disables operations  
for both program and erase in any combination of the sectors  
(September, 2011, Version 1.6)  
1
AMIC Technology, Corp.  

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