A29DL324 Series
Absolute Maximum Ratings*
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of
this device at these or any other conditions above
those indicated in the operational sections of these
specification is not implied or intended. Exposure to
the absolute maximum rating conditions for extended
periods may affect device reliability.
Storage Temperature (Tstg) . . . . . . . . . . -55°C to + 125°C
Operating Ambient Temperature (TA) . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to + 85°C
Input / Output Voltage with Respect to GND
(ACC),
. . . . . . . . . . . . -0.5V Note1 to 13.0V
WP
RESET
(ACC),
All Pins except
. . . . . . . . . . . . . . .
RESET
WP
. . . . . . . . . . . . . -0.5V Note1 to VCC + 0.4 (4.0V max.) Note2
Supply Voltage with Respect to GND (VCC)
Recommended Operating Conditions
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 4.0V
Operating Ambient Temperature (TA) . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . +2.7V to +3.6V
Notes:
1. -2.0V (Min.) (Pulse width £ 20ns)
2. VCC + 0.5V (Max.) (Pulse width £ 20ns)
Bus Operations
The following table shows the operation modes of the dual
operation flash memory. Before turning on power, input
GND ± 0.2 V to the
until VCC ³ VCC (min.).
RESET
Table 1. A29DL324 Bus Operations
Operation
BYTE mode
I/O15, A6 A1 A0
I/O0 to
I/O7
I/O8 to
I/O15
CE OE WE
RESET WP
(ACC)
A-1
Read (Note)
Write
L
L
L
L
H
H
L
A-1
X
Address input Data output
Hi-Z
H
H
X
X
WORD mode
BYTE mode
WORD mode
Address input
Address input
Address input
Data output
L
H
H
X
X
H
X
A-1
X
Data input
Hi-Z
H
Note3
Note3
X
L
L
Data input
H
Standby
H
X
L
X
X
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
H
Hardware reset / Standby
Output Disable
X
L
X
X
H
X
Temporary Sector Group Unprotect
X
X
Hi-Z or
Data input / output
Address input Data output Hi-Z
Address input Data output
Hi-Z or
Data input / output
Data input Hi-Z
Data input
VID
Note3
Automatic Sleep
Mode
BYTE mode
L
L
X
L
L
X
H
H
X
A-1
X
H
H
X
X
X
L
WORD mode
Boot Block Sector Protect
X
X
X
X
Accelerated Mode
BYTE mode
WORD mode
L
L
H
H
L
L
A-1
X
Address input
Address input
H
H
VACC
VACC
Note: When
= VIL, VIL can be applied to
. When
= VIH, a write operation is started.
OE
OE
WE
Remarks: 1. H : VIH, L : VIL, : VIH or VIL, VID : 11.5 V to 12.5 V, VACC : 8.5 V to 9.5 V
2. If an address is held longer than the minimum read cycle time (tRC), the automatic sleep mode is set.
3. If (ACC)=VIL, sector 0,1,140, and 141 remain protected. If (ACC)=VIH, protection on sectors 0,1,140, and 141
WP
WP
depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block
Protection and Unprotection”. If
(ACC)=VHH, all sectors will be unprotected.
WP
PRELIMINARY
(May, 2002, Version 0.0)
5
AMIC Technology, Inc.