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A29002TV-90 PDF预览

A29002TV-90

更新时间： 2024-01-28 03:44:01
品牌 Logo 应用领域
联笙电子 - AMICC 闪存
页数 文件大小 规格书
32页 314K
描述
256K X 8 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory

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A29002TV-90 技术参数

是否Rohs认证： 符合生命周期：Contact Manufacturer
零件包装代码：TSOP1包装说明：TSOP1, TSSOP32,.8,20
针数：32Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.32.00.51
风险等级：5.35最长访问时间：90 ns
其他特性：TOP BOOT SECTOR启动块：TOP
命令用户界面：YES数据轮询：YES
耐久性：100000 Write/Erase CyclesJESD-30 代码：R-PDSO-G32
长度：18.4 mm内存密度：2097152 bit
内存集成电路类型：FLASH内存宽度：8
功能数量：1部门数/规模：1,2,1,3
端子数量：32字数：262144 words
字数代码：256000工作模式：ASYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：256KX8封装主体材料：PLASTIC/EPOXY
封装代码：TSOP1封装等效代码：TSSOP32,.8,20
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE
并行/串行：PARALLEL电源：5 V
编程电压：5 V认证状态：Not Qualified
座面最大高度：1.2 mm部门规模：16K,8K,32K,64K
最大待机电流：0.000005 A子类别：Flash Memories
最大压摆率：0.04 mA最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
切换位：YES类型：NOR TYPE
宽度：8 mm

A29002TV-90 数据手册

 浏览型号A29002TV-90的Datasheet PDF文件第4页浏览型号A29002TV-90的Datasheet PDF文件第5页浏览型号A29002TV-90的Datasheet PDF文件第6页浏览型号A29002TV-90的Datasheet PDF文件第8页浏览型号A29002TV-90的Datasheet PDF文件第9页浏览型号A29002TV-90的Datasheet PDF文件第10页 
A29002/A290021 Series  
Sector Protection/Unprotection  
The hardware sector protection feature disables both  
program and erase operations in any sector. The hardware  
sector unprotection feature re-enables both program and  
erase operations in previously protected sectors.  
START  
Sector protection/unprotection must be implemented using  
programming equipment. The procedure requires a high  
voltage (VID) on address pin A9 and the control pins.  
The device is shipped with all sectors unprotected.  
RESET = VID  
(Note 1)  
It is possible to determine whether a sector is protected or  
unprotected. See "Autoselect Mode" for details.  
Hardware Data Protection  
Perform Erase or  
Program Operations  
The requirement of command unlocking sequence for  
programming or erasing provides data protection against  
inadvertent writes (refer to the Command Definitions table).  
In addition, the following hardware data protection measures  
prevent accidental erasure or programming, which might  
otherwise be caused by spurious system level signals during  
VCC power-up transitions, or from system noise. The device is  
powered up to read array data to avoid accidentally writing  
data to the array.  
RESET = VIH  
Write Pulse "Glitch" Protection  
Temporary Sector  
Unprotect  
Completed (Note 2)  
Noise pulses of less than 5ns (typical) on  
do not initiate a write cycle.  
,
or  
OE CE  
WE  
Logical Inhibit  
Notes:  
1. All protected sectors unprotected.  
2. All previously protected sectors are protected once again.  
Write cycles are inhibited by holding any one of  
=VIL,  
OE  
CE  
= VIH or  
= VIH. To initiate a write cycle,  
and  
CE  
WE  
must be a logical zero while  
is a logical one.  
OE  
WE  
Figure 1. Temporary Sector Unprotect Operation  
Power-Up Write Inhibit  
If  
=
= VIL and  
= VIH during power up, the  
OE  
WE  
device does not accept commands on the rising edge of  
. The internal state machine is automatically reset to  
CE  
WE  
reading array data on the initial power-up.  
Temporary Sector Unprotect (N/A on A290021)  
This feature allows temporary unprotection of previous  
protected sectors to change data in-system. The Sector  
Unprotect mode is activated by setting the  
pin to VID.  
RESET  
During this mode, formerly protected sectors can be  
programmed or erased by selecting the sector addresses.  
Once VID is removed from the  
pin, all the previously  
RESET  
protected sectors are protected again. Figure 1 shows the  
algorithm, and the Temporary Sector Unprotect diagram  
shows the timing waveforms, for this feature.  
(February, 2002, Version 1.0)  
7
AMIC Technology, Inc.  
1...45678910...32

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