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A290011UL-70 PDF预览

A290011UL-70

更新时间: 2024-01-17 03:44:36
品牌 Logo 应用领域
联笙电子 - AMICC 闪存
页数 文件大小 规格书
32页 312K
描述
128K X 8 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory

A290011UL-70 技术参数

是否Rohs认证: 符合生命周期:Contact Manufacturer
零件包装代码:QFJ包装说明:QCCJ, LDCC32,.5X.6
针数:32Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.57最长访问时间:70 ns
其他特性:BOTTOM BOOT SECTOR启动块:BOTTOM
命令用户界面:YES数据轮询:YES
JESD-30 代码:R-PQCC-J32长度:13.97 mm
内存密度:1048576 bit内存集成电路类型:FLASH
内存宽度:8功能数量:1
部门数/规模:1,2,1,3端子数量:32
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:128KX8
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC32,.5X.6封装形状:RECTANGULAR
封装形式:CHIP CARRIER并行/串行:PARALLEL
电源:5 V编程电压:5 V
认证状态:Not Qualified座面最大高度:3.4 mm
部门规模:8K,4K,16K,32K最大待机电流:0.000005 A
子类别:Flash Memories最大压摆率:0.04 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD切换位:YES
类型:NOR TYPE宽度:11.43 mm

A290011UL-70 数据手册

 浏览型号A290011UL-70的Datasheet PDF文件第1页浏览型号A290011UL-70的Datasheet PDF文件第3页浏览型号A290011UL-70的Datasheet PDF文件第4页浏览型号A290011UL-70的Datasheet PDF文件第5页浏览型号A290011UL-70的Datasheet PDF文件第6页浏览型号A290011UL-70的Datasheet PDF文件第7页 
A29001/A290011 Series  
The host system can detect whether a program or erase  
operation is complete by reading the I/O7 ( Polling) and  
I/O6 (toggle) status bits. After a program or erase cycle has  
been completed, the device is ready to read array data or  
accept another command.  
The sector erase architecture allows memory sectors to be  
erased and reprogrammed without affecting the data contents  
of other sectors. The A29001 is fully erased when shipped  
from the factory.  
of memory. This can be achieved via programming  
equipment.  
The Erase Suspend feature enables the user to put erase on  
hold for any period of time to read data from, or program data  
to, any other sector that is not selected for erasure. True  
background erase can thus be achieved.  
Data  
Power consumption is greatly reduced when the device is  
placed in the standby mode.  
The hardware  
pin terminates any operation in  
RESET  
The hardware sector protection feature disables operations for  
both program and erase in any combination of the sectors  
progress and resets the internal state machine to reading  
array data (This feature is not available on the A290021).  
Pin Configurations  
nDIP  
nPLCC  
NC on A290011  
NC on A290011  
1
VCC  
WE  
NC  
32  
31  
30  
RESET  
A16  
2
3
4
A15  
A12  
A7  
A6  
A5  
A4  
A3  
A2  
A14  
A13  
A8  
29  
28  
27  
26  
5
6
7
8
A14  
A13  
A8  
A7  
A6  
A5  
A4  
29  
28  
27  
26  
25  
24  
23  
22  
21  
5
6
A9  
7
A9  
8
A11  
25  
24  
23  
22  
A29001L/  
A290011L  
A11  
OE  
A10  
CE  
9
A3  
A2  
OE  
9
10  
A10  
10  
11  
12  
13  
14  
15  
16  
11  
12  
13  
CE  
A1  
A0  
A1  
A0  
I/O7  
21  
20  
19  
18  
17  
I/O0  
I/O1  
I/O2  
VSS  
I/O7  
I/O6  
I/O5  
I/O4  
I/O3  
I/O0  
nTSOP (Forward type)  
A11  
A9  
A8  
A13  
A14  
NC  
1
2
3
4
5
6
7
8
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
OE  
A10  
CE  
I/O  
7
6
5
4
3
I/O  
I/O  
I/O  
I/O  
WE  
VCC  
RESET  
A16  
A15  
A29001V/A290011V  
9
VSS  
10  
11  
12  
13  
14  
15  
16  
I/O  
I/O  
I/O  
A0  
A1  
A2  
A3  
2
1
0
NC on A290011  
A12  
A7  
A6  
A5  
A4  
PRELIMINARY  
(August, 2001, Version 0.3)  
2
AMIC Technology, Inc.  

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