Datasheet > A2580PN-F

A2580PN-F

更新时间： 2024-02-23 00:15:50

品牌	Logo	应用领域
联笙电子 - AMICC		闪存
页数	文件大小	规格书
38页	511K
描述
16 Mbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface

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A2580PN-F 技术参数

生命周期：	Obsolete	零件包装代码：	SOIC
包装说明：	SOP,	针数：	20
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.84
Is Samacsys：	N	内置保护：	TRANSIENT
接口集成电路类型：	BUFFER OR INVERTER BASED PERIPHERAL DRIVER	JESD-30 代码：	R-PDSO-G20
长度：	12.8 mm	标称负供电电压：	-45 V
功能数量：	1	端子数量：	20
最高工作温度：	85 °C	最低工作温度：	-20 °C
输出电流流向：	SOURCE	标称输出峰值电流：	0.5 A
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
认证状态：	Not Qualified	座面最大高度：	2.65 mm
表面贴装：	YES	温度等级：	OTHER
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	断开时间：	5 µs
接通时间：	5 µs	宽度：	7.5 mm
Base Number Matches：	1

A2580PN-F 数据手册

A25L16P Series

SIGNAL DESCRIPTION

Serial Data Output (DO). This output signal is used to

transfer data serially out of the device. Data is shifted out on

the falling edge of Serial Clock (C).

The DO pin is also used as an input pin when the Fast Read

Dual Input-Output Function is executed.

Serial Data Input / Output (DIO). This input signal is used to

transfer data serially into the device. It receives instructions,

addresses, and the data to be programmed. Values are

latched on the rising edge of Serial Clock (C).

The DIO pin is also used as an output pin when the Fast

Read Dual Output function and Fast Read Dual Input-Output

function are executed.

Serial Clock (C). This input signal provides the timing of the

serial interface. Instructions, addresses, or data present at

Serial Data Input (DIO) are latched on the rising edge of

Serial Clock (C). Data on Serial Data Output (DO) changes

after the falling edge of Serial Clock (C).

Status Register cycle is in progress, the device will be in the

Standby mode (this is not the Deep Power-down mode).

Driving Chip Select ( ) Low enables the device, placing it in

the active power mode.

After Power-up, a falling edge on Chip Select ( ) is required

prior to the start of any instruction.

Hold (

). The Hold (

) signal is used to pause

HOLD

any serial communications with the device without

deselecting the device.

During the Hold condition, the Serial Data Output (DO) is

high impedance, and Serial Data Input (DIO) and Serial

Clock (C) are Don’t Care. To start the Hold condition, the

device must be selected, with Chip Select ( ) driven Low.

Write Protect ( ). The main purpose of this input signal is

to freeze the size of the area of memory that is protected

against program or erase instructions (as specified by the

values in the BP2, BP1 and BP0 bits of the Status Register).

Chip Select ( ). When this input signal is High, the device

is deselected and Serial Data Output (DO) is at high

impedance. Unless an internal Program, Erase or Write

SPI MODES

the falling edge of Serial Clock (C).

These devices can be driven by a microcontroller with its SPI

peripheral running in either of the two following modes:

– CPOL=0, CPHA=0

– CPOL=1, CPHA=1

For these two modes, input data is latched in on the rising

edge of Serial Clock (C), and output data is available from

The difference between the two modes, as shown in Figure 2,

is the clock polarity when the bus master is in Stand-by mode

and not transferring data:

– C remains at 0 for (CPOL=0, CPHA=0)

– C remains at 1 for (CPOL=1, CPHA=1)

PRELIMINARY (April, 2007, Version 0.6)

AMIC Technology Corp.

1 2 345 6 7...38

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与A2580PN-F相关器件

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A2580PQ-F	AMICC	16 Mbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface	获取价格
A2580SLW	ALLEGRO	8-CHANNEL SOURCE DRIVERS	获取价格
A2580SLWTR	ETC	Interface IC	获取价格
A2585SLW	ALLEGRO	8-CHANNEL SOURCE DRIVERS	获取价格
A2585SLWTR	ETC	Octal Peripheral Driver	获取价格
A2588SLW	ALLEGRO	8-CHANNEL SOURCE DRIVERS	获取价格

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