Datasheet > A1240XL-FPGB

A1240XL-FPGB

更新时间： 2024-01-02 20:16:56

品牌	Logo	应用领域
ACTEL		/
页数	文件大小	规格书
84页	3116K
描述
Integrator Series FPGAs: 1200XL and 3200DX Families

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技术参数
数据手册

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A1240XL-FPGB 技术参数

是否Rohs认证：	符合	生命周期：	Lifetime Buy
包装说明：	ROHS COMPLIANT, PLASTIC PACKAGE-4	Reach Compliance Code：	compliant
HTS代码：	8541.40.95.00	风险等级：	5.56
其他特性：	UL RECOGNIZED	配置：	SINGLE WITH BUILT-IN RESISTOR
最大正向电流：	0.004 A	最大绝缘电压：	4000 V
元件数量：	1	最大通态电流：	40 A
最高工作温度：	80 °C	最低工作温度：	-40 °C
光电设备类型：	TRIGGER OUTPUT SSR	Base Number Matches：	1

A1240XL-FPGB 数据手册

Integrator Series FPGAs: 1200XL and 3200DX Families

Logic Modules

either a D-type flip-flop or a transparent latch. To increase

3200DX and 1200XL devices contain three types of logic

modules: combinatorial (C-modules), sequential

flexibility, the S-module register can be bypassed so that it

implements purely combinatorial logic.

(S-modules), and decode (D-modules). 1200XL devices

contain only the C-module and S-module, while the 3200DX

devices contain D-modules and dual-port SRAM modules in

addition to the S-module and C-module.

The C-module is shown in Figure 1 and implements the

following function:

D00

Y=!S1*!S0*D00+!S1*S0*D01+S1*!S0*D10+S1*S0*D11

D01

where:

D10

D11

S0=A0*B0

S1=A1+B1

The S-module shown in Figure 2 is designed to implement

high-speed sequential functions within a single logic

module. The S-module implements the same combinatorial

logic function as the C-module while adding a sequential

element. The sequential element can be configured as

Figure 1 • C-Module Implementation

D00

D01

D00

D01

OUT

D10

D11

GATE

CLR

Up to 7-Input Function Plus D-Type Flip-Flop with Clear

Up to 7-Input Function Plus Latch

D00

D01

OUT

D10

D11

GATE

CLR

Up to 8-Input Function (Same as C-Module)

Up to 4-Input Function Plus Latch with Clear

Figure 2 • S-Module Implementation

Discontinued – v3.0

1...3 4 567 8 9...84

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