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A1225XL-2PQG100I PDF预览

A1225XL-2PQG100I

更新时间: 2024-01-09 10:41:37
品牌 Logo 应用领域
ACTEL 现场可编程门阵列可编程逻辑
页数 文件大小 规格书
84页 2085K
描述
Field Programmable Gate Array, 202.7MHz, 451-Cell, CMOS, PQFP100

A1225XL-2PQG100I 技术参数

是否Rohs认证: 符合生命周期:Obsolete
Reach Compliance Code:unknown风险等级:5.84
JESD-30 代码:S-PQFP-G160湿度敏感等级:3
输入次数:125逻辑单元数量:1362
输出次数:125端子数量:160
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP160,1.2SQ封装形状:SQUARE
封装形式:FLATPACK电源:5 V
可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY认证状态:Not Qualified
子类别:Field Programmable Gate Arrays标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:0.635 mm端子位置:QUAD
Base Number Matches:1

A1225XL-2PQG100I 数据手册

 浏览型号A1225XL-2PQG100I的Datasheet PDF文件第75页浏览型号A1225XL-2PQG100I的Datasheet PDF文件第76页浏览型号A1225XL-2PQG100I的Datasheet PDF文件第77页浏览型号A1225XL-2PQG100I的Datasheet PDF文件第79页浏览型号A1225XL-2PQG100I的Datasheet PDF文件第80页浏览型号A1225XL-2PQG100I的Datasheet PDF文件第81页 
Integrator Series FPGAs: 1200XL and 3200DX Families  
Package Pin Assignments (continued)  
176-Pin CPGA (Top View)  
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15  
A
B
C
D
E
F
A
B
C
D
E
F
G
H
J
G
H
J
176-Pin  
CPGA  
K
L
K
L
M
N
P
R
M
N
P
R
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15  
Signal  
Pad Number  
Location  
PRA or I/O  
PRB or I/O  
MODE  
152  
160  
2
C9  
D7  
C3  
B14  
B3  
A9  
B8  
SDI or I/O  
DCLK or I/O  
CLKA or I/O  
CLKB or I/O  
GND  
135  
175  
154  
158  
1, 8, 18, 23, 33, 38, 45, 57, 67, 77, 89  
D4, E4, G4, H4, K4, L4, M4, M6, M8, M10, M12  
K12, J12, J13, H12, F12, E12, D12, D10, C8, D6  
101, 106, 111, 121, 126, 133, 145, 156, 165  
V
CC  
13, 24, 28, 52, 68, 82, 112, 116, 140, 155, 170  
F4, H2, H3, J4, M5, N8, M11, J14, H13, H14, G12, D11, D8, D5  
Notes:  
1. Unused I/O pins are designated as outputs by ALS and are driven LOW.  
2. All unassigned pins are available for use as I/Os.  
3. MODE = GND, except during device programming or debugging.  
78  
v3.0  

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