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5962-87624012A PDF预览

5962-87624012A

更新时间: 2024-01-12 01:03:50
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
17页 667K
描述
HEX SCHMITT-TRIGGER INVERTERS

5962-87624012A 技术参数

生命周期:Active零件包装代码:QLCC
包装说明:QCCN,针数:20
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.21系列:AC
JESD-30 代码:S-CQCC-N20长度:8.89 mm
逻辑集成电路类型:INVERTER功能数量:6
输入次数:1端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:QCCN
封装形状:SQUARE封装形式:CHIP CARRIER
传播延迟(tpd):10 ns认证状态:Qualified
座面最大高度:1.905 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
宽度:8.89 mmBase Number Matches:1

5962-87624012A 数据手册

 浏览型号5962-87624012A的Datasheet PDF文件第2页浏览型号5962-87624012A的Datasheet PDF文件第3页浏览型号5962-87624012A的Datasheet PDF文件第4页浏览型号5962-87624012A的Datasheet PDF文件第5页浏览型号5962-87624012A的Datasheet PDF文件第6页浏览型号5962-87624012A的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢃꢇ ꢀꢁ ꢈꢃ ꢄꢅ ꢆꢃ  
ꢉꢊ ꢋ ꢀꢅ ꢉꢌꢍ ꢎꢎꢏꢎ ꢐꢍꢑ ꢑ ꢊꢐ ꢍꢁ ꢒꢊ ꢐ ꢎꢊ ꢐꢀ  
SCAS522F − AUGUST 1995 − REVISED OCTOBER 2003  
D
D
D
2-V to 6-V V  
Operation  
CC  
Inputs Accept Voltages to 6 V  
Max t of 9.5 ns at 5 V  
pd  
SN54AC14 . . . J OR W PACKAGE  
SN54AC14 . . . FK PACKAGE  
(TOP VIEW)  
SN74AC14 . . . D, DB, N, NS, OR PW PACKAGE  
(TOP VIEW)  
1A  
1Y  
V
CC  
6A  
1
2
3
4
5
6
7
14  
13  
3
2
1
20 19  
18  
6Y  
NC  
5A  
NC  
5Y  
2A  
NC  
2Y  
4
5
6
7
8
2A  
12 6Y  
11 5A  
10 5Y  
17  
16  
15  
14  
2Y  
3A  
NC  
3A  
9
8
3Y  
4A  
4Y  
GND  
9 10 11 12 13  
NC − No internal connection  
description/ordering information  
These Schmitt-trigger devices contain six independent inverters. They perform the Boolean function Y = A.  
Because of the Schmitt action, they have different input threshold levels for positive-going (V ) and for  
T+  
negative-going (V ) signals.  
T−  
These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give  
clean, jitter-free output signals. They also have a greater noise margin than conventional inverters.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
SOIC − D  
Tube  
SN74AC14N  
SN74AC14N  
Tube  
SN74AC14D  
AC14  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SN74AC14DR  
SN74AC14NSR  
SN74AC14DBR  
SN74AC14PW  
SN74AC14PWR  
SNJ54AC14J  
SNJ54AC14W  
SNJ54AC14FK  
SOP − NS  
AC14  
AC14  
−40°C to 85°C  
SSOP − DB  
TSSOP − PW  
AC14  
Tape and reel  
Tube  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54AC14J  
SNJ54AC14W  
SNJ54AC14FK  
Tube  
−55°C to 125°C  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢔ ꢘ ꢣ ꢛ ꢚꢦ ꢡꢠ ꢞꢟ ꢠꢚ ꢜꢣ ꢥꢗ ꢝꢘ ꢞ ꢞꢚ ꢌꢍ ꢭꢏ ꢓꢐ ꢮ ꢏꢯꢰꢂ ꢯꢂꢇ ꢝꢥꢥ ꢣꢝ ꢛ ꢝ ꢜꢢ ꢞꢢꢛ ꢟ ꢝ ꢛ ꢢ ꢞꢢ ꢟꢞꢢ ꢦ  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ  
ꢡ ꢘꢥ ꢢꢟꢟ ꢚ ꢞꢨꢢ ꢛ ꢪꢗ ꢟꢢ ꢘ ꢚꢞꢢ ꢦꢧ ꢔ ꢘ ꢝꢥ ꢥ ꢚ ꢞꢨꢢ ꢛ ꢣꢛ ꢚ ꢦꢡꢠ ꢞꢟ ꢇ ꢣꢛ ꢚ ꢦꢡꢠ ꢞꢗꢚ ꢘ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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