Datasheet > LPC2939FBD208,551

LPC2939FBD208,551

更新时间： 2024-02-26 18:27:24

品牌	Logo	应用领域
恩智浦 - NXP		时钟 PC 微控制器外围集成电路
页数	文件大小	规格书
98页	660K
描述
LPC2939 - ARM9 microcontroller with CAN, LIN, and USB QFP 208-Pin

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LPC2939FBD208,551 技术参数

Source Url Status Check Date：	2013-06-14 00:00:00	是否Rohs认证：	符合
生命周期：	Not Recommended	零件包装代码：	QFP
包装说明：	28 X 28 MM, 1.40 MM HEIGHT, PLASTIC, SOT-459, MS-026, LQFP-208	针数：	208
Reach Compliance Code：	compliant	风险等级：	5.77
具有ADC：	YES	地址总线宽度：	24
位大小：	32	CPU系列：	ARM9
最大时钟频率：	125 MHz	DAC 通道：	NO
DMA 通道：	YES	外部数据总线宽度：	32
JESD-30 代码：	S-PQFP-G208	JESD-609代码：	e3
长度：	28 mm	湿度敏感等级：	2
I/O 线路数量：	152	端子数量：	208
最高工作温度：	85 °C	最低工作温度：	-40 °C
PWM 通道：	YES	封装主体材料：	PLASTIC/EPOXY
封装代码：	LFQFP	封装等效代码：	QFP208,1.2SQ,20
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：	260	电源：	1.8,3.3,3.3/5 V
认证状态：	Not Qualified	RAM（字节）：	57344
ROM（单词）：	786432	ROM可编程性：	FLASH
座面最大高度：	1.6 mm	速度：	125 MHz
子类别：	Microcontrollers	最大供电电压：	1.89 V
最小供电电压：	1.71 V	标称供电电压：	1.8 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin (Sn)
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	28 mm	uPs/uCs/外围集成电路类型：	MICROCONTROLLER, RISC
Base Number Matches：	1

LPC2939FBD208,551 数据手册

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LPC2939

ARM9 microcontroller with CAN, LIN, and USB

Rev. 02 — 7 December 2009

Product data sheet

1. General description

The LPC2939 combine an ARM968E-S CPU core with two integrated TCM blocks

operating at frequencies of up to 125 MHz, Full-speed USB 2.0 Host/OTG/Device

controller, CAN and LIN, 56 kB SRAM, 768 kB flash memory, external memory interface,

three 10-bit ADCs, and multiple serial and parallel interfaces in a single chip targeted at

consumer, industrial, medical, and communication markets. To optimize system power

consumption, the LPC2939 has a very flexible Clock Generation Unit (CGU) that provides

dynamic clock gating and scaling.

2. Features

ARM968E-S processor running at frequencies of up to 125 MHz maximum.

Multilayer AHB system bus at 125 MHz with four separate layers.

On-chip memory:

Two Tightly Coupled Memories (TCM), 32 kB Instruction (ITCM), 32 kB Data TCM

(DTCM)

Two separate internal Static RAM (SRAM) instances; 32 kB SRAM and 16 kB

SRAM

8 kB ETB SRAM, also usable for code execution and data

768 kB high-speed flash program memory

16 kB true EEPROM, byte-erasable/programmable

Dual-master, eight-channel GPDMA controller on the AHB multilayer matrix which can

be used with the SPI interfaces and the UARTs, as well as for memory-to-memory

transfers including the TCM memories

External Static Memory Controller (SMC) with eight memory banks; up to 32-bit data

bus; up to 24-bit address bus

Serial interfaces:

USB 2.0 full-speed Host/OTG/Device controller with dedicated DMA controller and

on-chip device PHY

Two-channel CAN controller supporting FullCAN and extensive message filtering

Two LIN master controllers with full hardware support for LIN communication. The

LIN interface can be configured as UART to provide two additional UART

interfaces.

Two 550 UARTs with 16-byte Tx and Rx FIFO depths, DMA support, modem

control, and RS-485/EIA-485 (9-bit) support

Three full-duplex Q-SPIs with four slave-select lines; 16 bits wide; 8 locations deep;

Tx FIFO and Rx FIFO

Two I²C-bus interfaces

12 3 4 5 6 7...98

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