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N02L163WN1AT-70I

更新时间： 2024-01-10 02:43:34
品牌 Logo 应用领域
NANOAMP 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
10页 91K
描述
Standard SRAM, 128KX16, 70ns, CMOS, PDSO44

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N02L163WN1AT-70I 技术参数

是否Rohs认证： 不符合生命周期：Contact Manufacturer
包装说明：TSOP, TSOP44,.46,32Reach Compliance Code：unknown
风险等级：5.88最长访问时间：70 ns
I/O 类型：COMMONJESD-30 代码：R-PDSO-G44
内存密度：2097152 bit内存集成电路类型：STANDARD SRAM
内存宽度：16端子数量：44
字数：131072 words字数代码：128000
工作模式：ASYNCHRONOUS最高工作温度：85 °C
最低工作温度：-40 °C组织：128KX16
输出特性：3-STATE封装主体材料：PLASTIC/EPOXY
封装代码：TSOP封装等效代码：TSOP44,.46,32
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE
并行/串行：PARALLEL电源：2.5/3.3 V
认证状态：Not Qualified最大待机电流：0.00001 A
最小待机电流：1.8 V子类别：SRAMs
最大压摆率：0.016 mA表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.8 mm
端子位置：DUALBase Number Matches：1

N02L163WN1AT-70I 数据手册

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NanoAmp Solutions, Inc.  
1982 Zanker Road, San Jose, CA 95112  
ph: 408-573-8878, FAX: 408-573-8877  
www.nanoamp.com  
N02L163WN1A  
2Mb Ultra-Low Power Asynchronous CMOS SRAM  
128Kx16 bit  
Overview  
Features  
The N02L163WN1A is an integrated memory  
device containing a 2 Mbit Static Random Access  
Memory organized as 131,072 words by 16 bits.  
The device is designed and fabricated using  
NanoAmp’s advanced CMOS technology to  
provide both high-speed performance and ultra-low  
power. The base design is the same as  
• Single Wide Power Supply Range  
2.3 to 3.6 Volts  
• Very low standby current  
2.0µA at 3.0V (Typical)  
• Very low operating current  
2.0mA at 3.0V and 1µs (Typical)  
NanoAmp’s N02L1618N1A, which is processed to  
operate at lower voltages. The device operates  
with a single chip enable (CE) control and output  
enable (OE) to allow for easy memory expansion.  
Byte controls (UB and LB) allow the upper and  
lower bytes to be accessed independently. The  
N02L163WN1A is optimal for various applications  
where low-power is critical such as battery backup  
and hand-held devices. The device can operate  
• Very low Page Mode operating current  
0.8mA at 3.0V and 1µs (Typical)  
• Simple memory control  
Single Chip Enable (CE)  
Byte control for independent byte operation  
Output Enable (OE) for memory expansion  
• Low voltage data retention  
Vcc = 1.8V  
over a very wide temperature range of -40oC to  
• Very fast output enable access time  
30ns OE access time  
+85oC and is available in JEDEC standard  
packages compatible with other standard 128Kb x  
16 SRAMs.  
• Automatic power down to standby mode  
• TTL compatible three-state output driver  
• Compact space saving BGA package avail-  
able  
Product Family  
Standby  
Operating  
Current (Icc),  
Max  
Package  
Type  
Operating  
Temperature  
Power  
Supply (Vcc)  
Current (I ),  
Part Number  
Speed  
SB  
Max  
N02L163WN1AB  
48 - BGA  
55ns @ 2.7V  
70ns @ 2.3V  
o
o
2.3V - 3.6V  
20 µA  
4 mA @ 1MHz  
-40 C to +85 C  
N02L163WN1AT 44 - TSOP II  
Pin Configurations  
Pin Descriptions  
1
LB  
I/O  
2
3
4
5
6
NC  
I/O  
A
A
A
A
A
4
3
2
1
0
1
2
3
4
5
6
7
8
PIN  
ONE  
A
A
A
OE  
UB  
5
6
7
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
Pin Name  
A -A  
Pin Function  
A
A
A
OE  
A
B
C
D
E
F
0
1
2
Address Inputs  
Write Enable Input  
Chip Enable Input  
Output Enable Input  
Lower Byte Enable Input  
Upper Byte Enable Input  
Data Inputs/Outputs  
Not Connected  
0
16  
A
A
A
A
A
UB  
CE  
I/O  
8
3
5
4
6
7
0
CE  
LB  
WE  
CE  
OE  
LB  
I/O  
I/O  
I/O  
I/O  
VCC  
VSS  
I/O  
I/O  
I/O  
I/O  
0
I/O15  
I/O14  
I/O13  
I/O12  
VSS  
VCC  
I/O11  
I/O10  
I/O  
V
I/O  
I/O  
V
9
10  
11  
12  
13  
1
2
1
2
3
9
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
NC  
NC  
SS  
3
4
5
CC  
V
A
A
A
A
V
CC  
16  
15  
13  
10  
SS  
4
5
6
7
UB  
I/O  
I/O  
A
I/O  
I/O  
14  
15  
14  
6
7
I/O  
I/O  
NC  
9
I/O -I/O  
8
0
15  
A
WE  
NC  
WE  
G
H
12  
A
A
A
A
A
16  
15  
14  
13  
12  
A
A
A
A
8
NC  
9
A
A
9
A
NC  
NC  
8
11  
V
10  
11  
Power  
CC  
48 Pin BGA (top)  
6 x 8 mm  
NC  
V
Ground  
SS  
Stock No. 23116-10 1/02  
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.  
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