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N02L083WC2AT-55I PDF预览

N02L083WC2AT-55I

更新时间: 2024-02-14 20:51:12
品牌 Logo 应用领域
NANOAMP 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
10页 77K
描述
Standard SRAM, 256KX8, 55ns, CMOS, PDSO32

N02L083WC2AT-55I 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSOP1包装说明:TSOP1-32
针数:32Reach Compliance Code:not_compliant
ECCN代码:3A991.B.2.AHTS代码:8542.32.00.41
风险等级:5.83最长访问时间:55 ns
JESD-30 代码:R-PDSO-G32JESD-609代码:e0
长度:18.4 mm内存密度:2097152 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端子数量:32
字数:262144 words字数代码:256000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:256KX8
封装主体材料:PLASTIC/EPOXY封装代码:TSOP1
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):240
认证状态:Not Qualified座面最大高度:1.25 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.3 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:8 mm
Base Number Matches:1

N02L083WC2AT-55I 数据手册

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NanoAmp Solutions, Inc.  
1982 Zanker Road, San Jose, CA 95112  
ph: 408-573-8878, FAX: 408-573-8877  
www.nanoamp.com  
N02L083WC2A  
2Mb Ultra-Low Power Asynchronous CMOS SRAM  
256Kx8 bit  
Overview  
Features  
The N02L083WC2A is an integrated memory  
device containing a 2 Mbit Static Random Access  
Memory organized as 262,144 words by 8 bits. The  
device is designed and fabricated using  
NanoAmp’s advanced CMOS technology to  
provide both high-speed performance and ultra-low  
power. The base design is the same as  
• Single Wide Power Supply Range  
2.3 to 3.6 Volts  
• Very low standby current  
2.0µA at 3.0V (Typical)  
• Very low operating current  
2.0mA at 3.0V and 1µs (Typical)  
NanoAmp’s N02L1618N1A, which is processed to  
operate at lower voltages. The device operates  
with two chip enable (CE1 and CE2) controls and  
output enable (OE) to allow for easy memory  
expansion. The N02L083WC2A is optimal for  
various applications where low-power is critical  
such as battery backup and hand-held devices.  
The device can operate over a very wide  
• Very low Page Mode operating current  
0.8mA at 3.0V and 1µs (Typical)  
• Simple memory control  
Dual Chip Enables (CE1 and CE2)  
Output Enable (OE) for memory expansion  
• Low voltage data retention  
Vcc = 1.8V  
temperature range of -40oC to +85oC and is  
available in JEDEC standard packages compatible  
with other standard 256Kb x 8 SRAMs  
• Very fast output enable access time  
30ns OE access time  
• Automatic power down to standby mode  
• TTL compatible three-state output driver  
Product Family  
Standby  
Operating  
Current (Icc),  
Max  
Package  
Type  
Operating  
Temperature  
Power  
Supply (Vcc)  
Current (I ),  
Part Number  
Speed  
SB  
Max  
N02L083WC2AT 32 - TSOP I  
N02L083WC2AN 32 - STSOP I  
55ns @ 2.7V  
70ns @ 2.3V  
o
o
2.3V - 3.6V  
20 µA  
4 mA @ 1MHz  
-40 C to +85 C  
Pin Configuration  
Pin Descriptions  
Pin Name  
A -A  
Pin Function  
OE  
32  
31  
CE1  
30  
A11  
A9  
A8  
A13  
WE  
CE2  
A15  
1
2
3
4
5
6
7
8
A10  
Address Inputs  
Write Enable Input  
Chip Enable Input  
Output Enable Input  
Data Inputs/Outputs  
0
17  
I/O7  
WE  
CE1, CE2  
OE  
29  
I/O6  
28  
I/O5  
27  
I/O4  
26  
N02L083WC2A  
STSOP, TSOP  
I/O3  
V
25  
CC  
V
9
24  
SS  
A17  
A16  
A14  
A12  
A7  
A6  
A5  
A4  
I/O -I/O  
10  
11  
12  
13  
14  
15  
16  
0
7
23  
22  
21  
20  
19  
18  
17  
I/O2  
I/O1  
I/O0  
A0  
A1  
A2  
V
Power  
CC  
V
Ground  
SS  
A3  
Stock No. 23120-03 1/02  
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.  
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