Integrated
Circuit
ICS952607
Systems, Inc.
Programmable Timing Control Hub™ for Next Gen P4™ processor
Recommended Application:
CK409 Compliant clock for Next Gen P4 Processor
Output Features:
Features/Benefits:
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•
•
•
•
•
•
•
QuadRomTM frequency selection.
Programmable output frequency.
•
•
•
•
•
•
•
•
2 - 0.7V current-mode differential CPU pairs
1 - 0.7V current-mode differential SRC pair
9 - PCI, 3 free running, 33MHz
3 - REF, 14.318MHz
3 - 3V66, 66.66MHz
1 - VCH/3V66, selectable 48MHz or 66MHz
2 - 48MHz
Programmable asynchronous 3V66&PCI frequency.
Programmable output divider ratios.
Programmable output rise/fall time.
Programmable output skew.
Programmable spread percentage for EMI control.
Watchdog timer technology to reset system if system
malfunctions.
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•
Programmable watch dog safe frequency.
Support I2C Index read/write and block read/write
operations.
1 - 24/48MHz
Key Specifications:
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CPU/SRC outputs cycle-cycle jitter < 125ps
3V66 outputs cycle-cycle jitter < 250ps
PCI outputs cycle-cycle jitter < 250ps
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Uses external 14.318MHz reference input.
Supports tight ppm accuracy clocks for Serial-ATA
Supports spread spectrum modulation, 0 to -0.5%
down spread and +/- 0.25% center spread
+/- 300ppm frequency accuracy on CPU & SRC clocks
•
Supports CPU clks up to 400MHz
Functionality
Pin Configuration
*FS1/REF0
*FS0/REF1
REF2
1
2
3
4
5
6
7
8
9
48 VDDA
47 GND
46 IREF
45 Reset#
44 GND
43 CPUCLKT1
42 CPUCLKC1
41
VDDCPU
40 CPUCLKT0
39 CPUCLKC0
Bit4 Bit3 Bit2 Bit1 Bit0
FS4 FS3 FS2 FS1 FS0
CPU
MHz
AGP
MHz
PCI
MHz
100.00
200.00
133.33
166.67
200.00
400.00
266.67
333.33
100.99
201.98
134.65
168.31
115.00
230.00
153.33
191.67
100.00
200.00
133.33
166.67
200.00
400.00
266.67
333.33
105.00
210.00
140.00
175.00
110.00
220.00
146.66
183.34
66.66
66.66
66.66
66.66
66.66
66.66
66.66
66.66
67.33
67.33
67.33
67.32
76.66
76.66
76.66
76.66
66.66
66.66
66.66
71.43
66.66
66.66
66.66
66.66
69.99
69.99
69.99
69.99
73.33
73.33
73.33
73.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.66
33.66
33.66
33.66
38.33
38.33
38.33
38.33
33.33
33.33
33.33
35.71
33.33
33.33
33.33
33.33
35.00
35.00
35.00
35.00
36.66
36.66
36.66
36.66
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
VDDREF
X1
X2
GND
**FS2/PCICLK_F0
**FS4/PCICLK_F1
PCICLK_F2 10
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
11
12
13
14
15
16
17
18
19
20
38
VDDPCI
GND
GND
37 SRCCLKT
36 SRCCLKC
^^PCICLK0
PCICLK1
PCICLK2
PCICLK3
VDDPCI
GND
35
VDD
34 VttPWR_GD/PD#
33 SDATA
32 SCLK
31
30
29
3V66_0
3V66_1
GND
PCICLK4
PCICLK5
**Sel24_48#/24_48MHz 21
28 VDD3V66
22
23
24
27
**FS3/48MHz_0
3V66_2
26 3V66_3/VCH
48MHz_1
25
GND
VDD48
* This pin have 120K pull-up to VDD
** This pin have 120K pull-down to GND
^^ An external 2.2K pull-down resistor is needed on this pin
48-pin SSOP
1
1
1
1
1
1
1
1
0
1
Note: FS1 and FS0 are equal to Intel CK409-defined FSA and FSB,
respectively.
0734A—A07/26/05