Figure 1-2. Pinout AT90USB64/128-QFN
(INT.6/AIN.0) PE6
(INT.7/AIN.1/UVcon) PE7
UVcc
1
2
PA3 (AD3)
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
PA4 (AD4)
3
PA5 (AD5)
INDEX CORNER
D-
4
5
PA6 (AD6)
D+
PA7 (AD7)
UGnd
6
PE2 (ALE/HWB)
PC7 (A15/IC.3/CLK0)
PC6 (A14/OC.3A)
PC5 (A13/OC.3B)
PC4 (A12/OC.3C)
PC3 (A11/T.3)
PC2 (A10)
UCap
7
VBus
8
AT90USB128
(64-lead QFN top view)
(IUID) PE3
9
(SS/PCINT0) PB0
(PCINT1/SCLK) PB1
(PDI/PCINT2/MOSI) PB2
(PDO/PCINT3/MISO) PB3
(PCINT4/OC.2A) PB4
(PCINT5/OC.1A) PB5
(PCINT6/OC.1B) PB6
10
11
12
13
14
15
16
PC1 (A9)
PC0 (A8)
PE1 (RD)
PE0 (WR)
Note:
The large center pad underneath the MLF packages is made of metal and internally connected to
GND. It should be soldered or glued to the board to ensure good mechanical stability. If the center
pad is left unconnected, the package might loosen from the board.
1.1
Disclaimer
Typical values contained in this datasheet are based on simulations and characterization of
other AVR microcontrollers manufactured on the same process technology. Min and Max values
will be available after the device is characterized.
2. Overview
The AT90USB64/128 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced
RISC architecture. By executing powerful instructions in a single clock cycle, the
4
AT90USB64/128
7593A–AVR–02/06