Datasheet > 79C940

79C940

更新时间： 2024-01-23 07:30:42

品牌	Logo	应用领域
罗彻斯特 - ROCHESTER		控制器以太网
页数	文件大小	规格书
13页	630K
描述
Media Access Controller for Ethernet (MACE) 84-pin PLCC and 100-pin PQFP Packages

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数据手册

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79C940 数据手册

79C940

mA79mC7994C0940

Media Access Controller for Ethernet (MACE™)

DISTINCTIVE CHARACTERISTICS

■ Integrated Controller with Manchester

encoder/decoder and 10BASE-T transceiver

and AUI port

■ Arbitrary byte alignment and little/big endian

memory interface supported

■ Internal/external loopback capabilities

■ Supports IEEE 802.3/ANSI 8802-3 and Ethernet

■ External Address Detection Interface (EADI)

for external hardware address filtering in

bridge/router applications

standards

■ 84-pin PLCC and 100-pin PQFP Packages

■ 80-pin Thin Quad Flat Pack (TQFP) package

available for space critical applications such as

PCMCIA

■ JTAG Boundary Scan (IEEE 1149.1) test access

port interface for board level production test

■ Integrated Manchester Encoder/Decoder

■ Modular architecture allows easy tuning to

■ Digital Attachment Interface (DAI) allows

by-passing of differential Attachment Unit

Interface (AUI)

specific applications

■ High speed, 16-bit synchronous host system

interface with 2 or 3 cycles/transfer

■ Supports the following types of network

■ Individual transmit (136 byte) and receive (128

byte) FlFOs provide increase of system latency

and support the following features:

interface:

— AUI to external 10BASE2, 10BASE5 or

10BASE-F MAU

— Automatic retransmission with no FIFO

reload

— DAI port to external 10BASE2, 10BASE5,

10BASE-T, 10BASE-F MAU

— Automatic receive stripping and transmit

padding (individually programmable)

— General Purpose Serial Interface (GPSI) to

external encoding/decoding scheme

— Automatic runt packet rejection

— Internal 10BASE-T transceiver with

— Automatic deletion of collision frames

automatic selection of 10BASE-T or AUI port

— Automatic retransmission with no FIFO

reload

■ Sleep mode allows reduced power consump-

tion for critical battery powered applications

■ Direct slave access to all on board

configuration/status registers and transmit/

receive FlFOs

■ 5 MHz-25 MHz system clock speed

■ Support for operation in industrial temperature

range (–40°C to +85°C) available in all three

packages

■ Direct FIFO read/write access for simple

interface to DMA controllers or l/O processors

For complete Rochester ordering guide, please refer to page 3

Please consult factory for speciﬁc package availability

Rochester Electronics guarantees performance of its semiconductor products to the original OEM speciﬁcations. “Typical” values are for reference purposes

only. Certain minimum or maximum ratings may be based on product characterization, design, simulation, or sample testing. Rochester Electronics reserves

the right to make changes without further notice to any speciﬁcation herein.

Speciﬁcation Number 79C940B-CI (A) Rev C

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与79C940相关器件

型号	品牌	获取价格	描述	数据表
79D05	FOSHAN	获取价格	TO-252
79D05A	UTC	获取价格	3 TERMINAL 1A NEGATIVE VOLTAGE REGULATOR
79D05AA	UTC	获取价格	3 TERMINAL 1.5A NEGATIVE VOLTAGE REGULATOR
79D05AAG-TM3-T	UTC	获取价格	3 TERMINAL 1.5A NEGATIVE VOLTAGE REGULATOR
79D05AAG-TN3-R	UTC	获取价格	3 TERMINAL 1.5A NEGATIVE VOLTAGE REGULATOR
79D05AAG-TN3-T	UTC	获取价格	3 TERMINAL 1.5A NEGATIVE VOLTAGE REGULATOR
79D05AAL-TM3-T	UTC	获取价格	3 TERMINAL 1.5A NEGATIVE VOLTAGE REGULATOR
79D05AAL-TN3-R	UTC	获取价格	3 TERMINAL 1.5A NEGATIVE VOLTAGE REGULATOR
79D05AAL-TN3-T	UTC	获取价格	3 TERMINAL 1.5A NEGATIVE VOLTAGE REGULATOR
79D05AG-TM3-R	UTC	获取价格	3 TERMINAL 1A NEGATIVE VOLTAGE REGULATOR

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