Datasheet > 78P2352-IGT/A04R/F

78P2352-IGT/A04R/F

更新时间： 2024-02-20 10:10:38

品牌	Logo	应用领域
TERIDIAN		/
页数	文件大小	规格书
41页	435K
描述
Telecom IC,

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技术参数
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78P2352-IGT/A04R/F 技术参数

生命周期：	Obsolete	Reach Compliance Code：	unknown
风险等级：	5.6	Base Number Matches：	1

78P2352-IGT/A04R/F 数据手册

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78P2352 Dual Channel OC-3/STM1-E/E4 Line Interface Unit

If no serial transmit clock is available, as in Figure 2,

the 78P2352 can recover a clock from the serial

NRZ data input and pass the data through the FIFO.

In this mode, the NRZ transmit data should be

source synchronous with the reference clock applied

at CKREFP/N. Each transmitter also includes a

Loss of Lock indicator (TXLOL) that can be used to

FUNCTIONAL DESCRIPTION (continued)

TRANSMITTER OPERATION

The transmitter section generates an analog signal

for transmission through either a transformer onto

the coaxial cable using CMI coding or directly to a

fiber optics module using NRZ coding.

The 78P2352 provides a flexible system interface for

compatibility with most off-the-shelf framers and

custom ASICs. The device supports a 4-bit parallel

interface in either slave or master clocking modes

and a number of serial NRZ timing modes.

trigger an interrupt.

Note that the FIFO is

automatically re-centered when the TXLOL register

bit transitions from high to low.

System Reference Clock

CKREFP/N

Each of the serial NRZ transmit timing modes can be

configured in HW mode or SW mode as shown in

the table below.

NRZ

CMI

Coax

CMIxP/N

RXxP/N

SIxDP/N

XFMR

Framer/

Mapper

TDK

78P2352

NRZ

SOxCKP/N

SOxDP/N

140 / 155 MHz

HW Control Pins SW Control Bits

Serial

Mode

SDI_PAR CKMODE PAR

SMOD[1:0]

Figure 2: Synchronous; data only

(Tx CDR enabled, FIFO enabled)

Synchronous

clock + data

Low

n/a

Low

Floating

High

0 0

Since the reference clock and transmit clock/data go

through different delay paths, it is inevitable that the

phase relationship between the two clocks can vary

in a bounded manner due to the fact that the

absolute delays in the two paths can vary over time.

The FIFO allows long-term clock phase drift, not

exceeding +/- 25.6ns, to be handled without transmit

error. If the clock wander exceeds the specified

limits, the FIFO will over or under flow, and the

FERRx register signal will be asserted. This signal

can be used to trigger an interrupt. This interrupt

event is cleared when an FRSTx pulse is applied,

and the FIFO is re-centered.

Synchronous

data only

1 0

0 1

Plesiochronou

s data only

Loop-timing

n/a

Synchronous Serial Modes

In Figure 1, serial NRZ transmit data is input to

SIDxP/N pins at LVPECL levels. By default, the data

is latched in on the rising edge of SICKxP. A clock

decoupling FIFO is provided to decouple the on chip

and off chip clocks. The SICKxP/N clock provided

by the framer/mapper IC must be source

synchronous with the internal reference transmit

clock if the FIFO is to be used.

Note: External remote loopbacks (i.e. loopback

within framer) are not possible in synchronous

operation (FIFO enabled) unless the reference

clock is synchronous with the recovered receive

clock (loop-timing).

Plesiochronous Serial Mode

System Reference Clock

Figure 3 represents the condition where no serial

transmit clock is available and the data is not source

synchronous to the reference clock input. In this

mode, the 78P2352 will recover a clock from the

serial plesiochronous data and bypass the FIFO.

Reference

CKREFP/N

NRZ

CMI

Coax

SIxDP/N

CMIxP/N

RXxP/N

XFMR

140 / 155 MHz

SIxCKP/N

Framer/

Mapper

TDK

NRZ

78P2352

SOxCKP/N

SOxDP/N

140 / 155 MHz

Clock

CKREFP

NRZ

CMI

Coax

Figure 1: Synchronous; clock and data available

(Tx CDR bypassed, FIFO enabled)

CMIxP/N

RXxP/N

SIxDP/N

XFMR

Framer/

Mapper

TDK

NRZ

78P2352

SOxCKP/N

SOxDP/N

140 / 155 MHz

Figure 3: Plesiochronous; data only

(Tx CDR enabled, FIFO bypassed)

1 2 3 456 7 8...41

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与78P2352-IGT/A04R/F相关器件

型号	品牌	获取价格	描述	数据表
78P2352-IGT/F	TERIDIAN	获取价格	Dual Channel OC-3/ STM1-E/ E4 LIU
78P2352-IGTR	TERIDIAN	获取价格	Dual Channel OC-3/ STM1-E/ E4 LIU
78P2352-IGTR/F	TERIDIAN	获取价格	Transceiver, 2-Func, PQFP128, LEAD FREE, LQFP-128
78P2361	PULSE	获取价格	T3/DS3/E3/STS-1 TRANSFORMERS
78P2361-IH	SST	获取价格	PCM Transceiver, 1-Func, PQCC28,
78P2361-IP	SST	获取价格	PCM Transceiver, 1-Func, PDIP28,
78P2362	PULSE	获取价格	T3/DS3/E3/STS-1 TRANSFORMERS
78P236-IH	SST	获取价格	PCM Transceiver, 1-Func, PDIP28, PLASTIC, LCC-28
78P300-IH	TI	获取价格	IC DATACOM, PCM TRANSCEIVER, PQCC28, PLASTIC, LCC-28, Digital Transmission Interface
78P300-IP	TI	获取价格	DATACOM, PCM TRANSCEIVER, PDIP28, PLASTIC, DIP-28

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