766143103GP

更新时间： 2024-02-08 08:29:45

品牌	Logo	应用领域
西迪斯 - CTS		/
页数	文件大小	规格书
5页	141K
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数据手册

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766143103GP 数据手册

Types of Circuits

Bussed (Schematic 1)

Isolated (Schematic 3)

Dual Terminator (Schematic 5)

R/2R Ladder (Schematic 7)

DIM.

.200 ⁺₋^._.⁰₀⁵₃⁰₀

.008⁺₋^._.⁰₀⁰₀²₁

"A" Dimension

No. of Pins

.810⁺₋^._.³₃³₀⁰₅

6.000±.200

.236±.008

PART

DATE CODE

NO.

3.900±.100

.154±.004

in.

+.013

.032

−.012

8.65 ±0.10

9.90 ±0.10

Notes

0.340 ±0.004

0.390 ±0.004

MODULES WILL BE

MARKED WITH A SQUARE

AT PIN #1 (TOP MARKING)

0°− 8°

INSULATION COATING

APPLIED ON TWO SURFACES

BELOW

SEATING

PLANE

mm 0.10 MAX

in. 0.004

1. Lead COPLANARITY

General Tolerances

.510±.203

.020±.008

1.550±.200

.061±.008

.180±.080

.007±.003

mm ±0.25

in. ±0.010

NOTE #1

mm & in. DIMENSIONS ARE NOT EQUIVALENT

.430±.050

.017±.002

1.270

TYP.

.050

Land Patterns

LEAD COUNT

0.63

.025

TYP.

in.

3.60

0.14

3.60

0.14

5.60

0.22

5.60

0.22

7.60

0.30

7.60

0.30

7.60

0.30

8.90

0.35

14P

16P

in.

1.27

.050

TYP.

2.03

.080

TYP.

Page 2 of 5

February 2008

CTS Electronic Components

Leaded Surface Mount Series 766

www.ctscorp.com

123 4 5

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