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74HCT4017N,652 PDF预览

74HCT4017N,652

更新时间: 2024-02-14 13:25:58
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
24页 178K
描述
74HC(T)4017 - Johnson decade counter with 10 decoded outputs DIP 16-Pin

74HCT4017N,652 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP16,.3
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.65
其他特性:JOHNSON COUNTER WITH 10 DECODED OUTPUTS计数方向:UP
系列:HCTJESD-30 代码:R-PDIP-T16
长度:19.025 mm负载电容(CL):50 pF
负载/预设输入:NO逻辑集成电路类型:RING COUNTER
最大频率@ Nom-Sup:20000000 Hz最大I(ol):0.004 A
工作模式:SYNCHRONOUS位数:10
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):260
电源:5 V传播延迟(tpd):75 ns
认证状态:Not Qualified座面最大高度:4.2 mm
子类别:Counters最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:AUTOMOTIVE端子面层:NICKEL/PALLADIUM/GOLD (NI/PD/AU)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:POSITIVE EDGE宽度:7.62 mm
最小 fmax:20 MHzBase Number Matches:1

74HCT4017N,652 数据手册

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74HC4017; 74HCT4017  
Johnson decade counter with 10 decoded outputs  
Rev. 4 — 10 December 2013  
Product data sheet  
1. General description  
The 74HC4017; 74HCT4017 is a 5-stage Johnson decade counter with 10 decoded  
outputs (Q0 to Q9), an output from the most significant flip-flop (Q5-9), two clock inputs  
(CP0 and CP1) and an overriding asynchronous master reset input (MR). The counter is  
advanced by either a LOW-to-HIGH transition at CP0 while CP1 is LOW or a  
HIGH-to-LOW transition at CP1 while CP0 is HIGH. When cascading counters, the Q5-9  
output, which is LOW while the counter is in states 5, 6, 7, 8 and 9, can be used to drive  
the CP0 input of the next counter. A HIGH on MR resets the counter to zero (Q0 = Q5-9 =  
HIGH; Q1 to Q9 = LOW) independent of the clock inputs (CP0 and CP1). Automatic code  
correction of the counter is provided by an internal circuit: following any illegal code the  
counter returns to a proper counting mode within 11 clock pulses. Inputs include clamp  
diodes. This enables the use of current limiting resistors to interface inputs to voltages in  
excess of VCC  
.
2. Features and benefits  
Wide supply voltage range from 2.0 V to 6.0 V  
Input levels:  
For 74HC4017: CMOS level  
For 74HCT4017: TTL level  
Complies with JEDEC standard no. 7 A  
ESD protection:  
HBM JESD22-A114E exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Multiple package options  
Specified from 40 C to +85 C and from 40 C to +125 C  
 
 

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