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7164L20Y8 PDF预览

7164L20Y8

更新时间: 2023-01-15 00:00:00
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器光电二极管
页数 文件大小 规格书
11页 133K
描述
Standard SRAM, 8KX8, 19ns, CMOS, PDSO28, 0.300 INCH, SOJ-28

7164L20Y8 数据手册

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IDT7164S/LS  
IDT7164L/LL  
CMOS Static RAM  
64K (8K x 8-Bit)  
Features  
Description  
High-speed address/chip select access time  
TheIDT7164isa65,536bithigh-speedstaticRAMorganizedas8K  
x8.ItisfabricatedusingIDT’shigh-performance,high-reliabilityCMOS  
technology.  
Military:20/25/35/45/55/70/85/100ns(max.)  
Industrial:25/35ns (max.)  
– Commercial:15/20/25/35ns(max.)  
Low power consumption  
Battery backup operation – 2V data retention voltage  
(L Version only)  
Produced with advanced CMOS high-performance  
technology  
Inputs and outputs directly TTL-compatible  
Three-state outputs  
Address access times as fast as 15ns are available and the circuit  
offers a reduced power standby mode. When CS1 goes HIGH or CS2  
goes LOW, the circuit will automatically go to, and remain in, a low-  
power stand by mode. The low-power (L) version also offers a battery  
backup data retention capability at power supply levels as low as 2V.  
All inputs and outputs of the IDT7164 are TTL-compatible and  
operation is from a single 5V supply, simplifying system designs. Fully  
static asynchronous circuitry is used, requiring no clocks or refreshing  
for operation.  
Available in 28-pin DIP, CERDIP and SOJ  
Military product compliant to MIL-STD-883, Class B  
TheIDT7164ispackagedina28-pin300milDIPandSOJ anda28-  
pin600milCERDIP.  
Militarygradeproductismanufacturedincompliancewiththelatest  
revision of MIL-STD-883, Class B, making it ideally suited to military  
temperature applications demandingthe highestlevelofperformance  
and reliability.  
Functional Block Diagram  
A0  
VCC  
GND  
65,536 BIT  
MEMORY ARRAY  
ADDRESS  
DECODER  
A
12  
7
0
I/O  
0
7
I/O CONTROL  
I/O  
CS1  
CS2  
OE  
CONTROL  
LOGIC  
2967 drw 01  
WE  
APRIL 2009  
1
DSC-2967/14  
©2007 IntegratedDeviceTechnology,Inc.  

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