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7016L35PFG PDF预览

7016L35PFG

更新时间: 2024-01-09 07:55:04
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器内存集成电路
页数 文件大小 规格书
20页 164K
描述
Dual-Port SRAM, 16KX9, 35ns, CMOS, PQFP80, 14 X 14 MM, 1.40 MM HEIGHT, GREEN, TQFP-80

7016L35PFG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFP
包装说明:LQFP, QFP80,.64SQ针数:80
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.75
最长访问时间:35 nsI/O 类型:COMMON
JESD-30 代码:S-PQFP-G80JESD-609代码:e3
长度:14 mm内存密度:147456 bit
内存集成电路类型:DUAL-PORT SRAM内存宽度:9
湿度敏感等级:3功能数量:1
端口数量:2端子数量:80
字数:16384 words字数代码:16000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:16KX9
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装等效代码:QFP80,.64SQ
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):260
电源:5 V认证状态:Not Qualified
座面最大高度:1.6 mm最大待机电流:0.005 A
最小待机电流:4.5 V子类别:SRAMs
最大压摆率:0.21 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.65 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:14 mmBase Number Matches:1

7016L35PFG 数据手册

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IDT7016S/L  
High-Speed 16K x 9 Dual-Port Static RAM  
Military, Industrial and Commercial Temperature Ranges  
Description  
The IDT7016 is a high-speed 16K x 9 Dual-Port Static RAM. The  
IDT7016 is designed to be used as stand-alone Dual-Port RAMs or as  
acombinationMASTER/SLAVEDual-PortRAMfor18-bit-or-morewider  
systems.UsingtheIDTMASTER/SLAVEDual-PortRAMapproachin18-  
bitorwidermemorysystemapplicationsresultsinfull-speed,error-free  
operationwithouttheneedforadditionaldiscretelogic.  
featurecontrolledbyCEpermitstheon-chipcircuitryofeachporttoenter  
a very low standby power mode.  
FabricatedusingIDT’sCMOShigh-performancetechnology,these  
devices typicallyoperate ononly750mWofpower.  
TheIDT7016is packagedinaceramic68-pinPGA,a64-pinPLCC  
and an 80-pinTQFP (Thin Quad Flatpack). Military grade product is  
manufacturedincompliancewiththelatestrevisionofMIL-PRF-38535  
QML,makingitideallysuitedtomilitarytemperatureapplicationsdemand-  
ingthehighestlevelofperformanceandreliability.  
This device provides two independent ports with separate control,  
address,andI/Opinsthatpermitindependent,asynchronousaccessfor  
reads or writes to any location in memory. An automatic power down  
PinConfigurations(1,2,3)  
11/19/01  
INDEX  
9
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61  
60  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
I/O2L  
I/O3L  
I/O4L  
I/O5L  
GND  
I/O6L  
I/O7L  
A
A
A
A
A
A
5L  
59  
58  
57  
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
4L  
3L  
2L  
1L  
0L  
IDT7016J  
,
(4)  
J68-1  
INTL  
BUSY  
GND  
M/S  
BUSY  
INT  
L
VCC  
68-Pin PLCC  
GND  
I/O0R  
I/O1R  
I/O2R  
(5)  
Top View  
R
R
VCC  
A
A
A
A
A
0R  
I/O3R  
I/O4R  
I/O5R  
I/O6R  
1R  
2R  
3R  
4R  
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43  
3190 drw 02  
Pin Names (7016)  
Left Port  
Right Port  
Names  
NOTES:  
1. All VCC pins must be connected to power supply.  
2. All GND pins must be connected to ground supply.  
3. Package body is approximately .95 in x .95 in x .17 in.  
4. This package code is used to reference the package diagram.  
5. This text does not imply orientation of Part-marking.  
Chip Enable  
CE  
R/W  
OE  
L
CE  
R/W  
OE  
R
L
R
Read/Write Enable  
Output Enable  
Address  
L
R
A0L - A13L  
A0R - A13R  
I/O0L - I/O8L  
SEM  
INT  
BUSY  
I/O0R - I/O8R  
Data Input/Output  
Semaphore Enable  
Interrupt Flag  
Busy Flag  
L
SEM  
INT  
BUSY  
M/S  
R
L
R
L
R
Master or Slave Select  
Power  
V
CC  
GND  
Ground  
3190 tbl 01  
2
6.42  

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