Datasheet > 5CEFA7F31C6N

5CEFA7F31C6N

更新时间： 2024-01-03 04:49:09

品牌	Logo	应用领域
英特尔 - INTEL		栅
页数	文件大小	规格书
95页	1359K
描述
Field Programmable Gate Array, 149500-Cell, CMOS, PBGA896, ROHS COMPLIANT, FBGA-896

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5CEFA7F31C6N 数据手册

CV-51002

2015.12.04

Recommended Operating Conditions

Symbol

Description

Condition

3.3 V

3.0 V

2.5 V

1.8 V

1.5 V

1.35 V

1.25 V

1.2 V

3.3 V

3.0 V

2.5 V

1.8 V

—

Minimum⁽²⁾

3.135

2.85

Typical

3.3

Maximum⁽²⁾

3.465

3.15

Unit

3.0

2.375

1.71

2.5

2.625

1.89

1.8

V_CCIO

I/O buffers power supply

1.425

1.283

1.19

1.5

1.575

1.418

1.31

1.35

1.25

1.2

1.14

1.26

3.135

2.85

3.3

3.465

3.15

3.0

V_CCPGM

Configuration pins power supply

2.375

1.71

2.5

2.625

1.89

1.8

(5)

V_{CCA_FPLL}

PLL analog voltage regulator power

supply

2.375

2.5

2.625

(6)

V_CCBAT

—

1.2

—

3.0

Battery back-up power supply

(For design security volatile key register)

V_I

DC input voltage

Output voltage

—

–0.5

—

3.6

V_O

VCCIO

(2)

The power supply value describes the budget for the DC (static) power supply tolerance and does not include the dynamic tolerance requirements.

Refer to the PDN tool for the additional budget for the dynamic tolerance requirements.

(5)

(6)

PLL digital voltage is regulated from V_{CCA_FPLL}

If you do not use the design security feature in Cyclone V devices, connect V_CCBATto a 1.5-V, 2.5-V, or 3.0-V power supply. Cyclone V power-on

reset (POR) circuitry monitors V_CCBAT. Cyclone V devices do not exit POR if V_CCBATis not powered up.

Cyclone V Device Datasheet

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