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5AGXMB1H4F40C6 PDF预览

5AGXMB1H4F40C6

更新时间: 2023-01-02 16:18:29
品牌 Logo 应用领域
英特尔 - INTEL
页数 文件大小 规格书
122页 2542K
描述
Field Programmable Gate Array, 500MHz, PBGA1517, FBGA-1517

5AGXMB1H4F40C6 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:BGA, BGA1517,39X39,40Reach Compliance Code:compliant
风险等级:5.29JESD-30 代码:S-PBGA-B1517
JESD-609代码:e1长度:40 mm
可配置逻辑块数量:11321输入次数:704
逻辑单元数量:300000输出次数:704
端子数量:1517最高工作温度:85 °C
最低工作温度:组织:11321 CLBS
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA1517,39X39,40封装形状:SQUARE
封装形式:GRID ARRAY峰值回流温度(摄氏度):NOT SPECIFIED
可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY座面最大高度:2.7 mm
最大供电电压:1.13 V最小供电电压:1.07 V
标称供电电压:1.1 V表面贴装:YES
温度等级:COMMERCIAL EXTENDED端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:40 mm

5AGXMB1H4F40C6 数据手册

 浏览型号5AGXMB1H4F40C6的Datasheet PDF文件第4页浏览型号5AGXMB1H4F40C6的Datasheet PDF文件第5页浏览型号5AGXMB1H4F40C6的Datasheet PDF文件第6页浏览型号5AGXMB1H4F40C6的Datasheet PDF文件第8页浏览型号5AGXMB1H4F40C6的Datasheet PDF文件第9页浏览型号5AGXMB1H4F40C6的Datasheet PDF文件第10页 
Electrical Characteristics  
Page 7  
DC Characteristics  
This section lists the following specifications:  
Supply Current and Power Consumption  
I/O Pin Leakage Current  
Bus Hold Specifications  
OCT Specifications  
Pin Capacitance  
Hot Socketing  
Supply Current and Power Consumption  
Standby current is the current drawn from the respective power rails used for power  
budgeting.  
Altera offers two ways to estimate power for your design—the Excel-based Early  
Power Estimator (EPE) and the Quartus® II PowerPlay Power Analyzer feature.  
Use the Excel-based Early Power Estimator (EPE) before you start your design to  
estimate the supply current for your design. The EPE provides a magnitude estimate  
of the device power because these currents vary greatly with the resources you use.  
The Quartus II PowerPlay Power Analyzer provides better quality estimates based on  
the specifics of the design after you complete place-and-route. The PowerPlay Power  
Analyzer can apply a combination of user-entered, simulation-derived, and estimated  
signal activities that, when combined with detailed circuit models, yields very  
accurate power estimates.  
f
For more information about power estimation tools, refer to the PowerPlay Early Power  
Estimator User Guide and the PowerPlay Power Analysis chapter in the Quartus II  
Handbook.  
I/O Pin Leakage Current  
Table 6 lists the Arria V I/O pin leakage current specifications.  
Table 6. I/O Pin Leakage Current for Arria V Devices  
Symbol  
II  
IOZ  
Description  
Input pin  
Tri-stated I/O pin  
Conditions  
VI = 0 V to VCCIOMAX  
VO = 0 V to VCCIOMAX  
Min  
–30  
–30  
Typ  
Max  
30  
Unit  
µA  
30  
µA  
December 2013 Altera Corporation  
Arria V GX, GT, SX, and ST Device Datasheet  

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