5秒后页面跳转
5962F9563005VXC PDF预览

5962F9563005VXC

更新时间: 2022-05-17 01:23:33
品牌 Logo 应用领域
英特矽尔 - INTERSIL 复用器
页数 文件大小 规格书
7页 415K
描述
Rad-Hard 16 Channel BiCMOS Analog Multiplexer with High-Z Analog Input Protection

5962F9563005VXC 数据手册

 浏览型号5962F9563005VXC的Datasheet PDF文件第1页浏览型号5962F9563005VXC的Datasheet PDF文件第2页浏览型号5962F9563005VXC的Datasheet PDF文件第3页浏览型号5962F9563005VXC的Datasheet PDF文件第4页浏览型号5962F9563005VXC的Datasheet PDF文件第5页浏览型号5962F9563005VXC的Datasheet PDF文件第6页 
HS-1840ARH, HS-1840AEH, HS-1840BRH, HS-1840BEH  
Ceramic Metal Seal Flatpack Packages (Flatpack)  
K28.A MIL-STD-1835 CDFP3-F28 (F-11A, CONFIGURATION B)  
A
28 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE  
A
e
INCHES  
MIN  
MILLIMETERS  
PIN NO. 1  
ID AREA  
SYMBOL  
MAX  
0.115  
0.022  
0.019  
0.009  
0.006  
0.740  
0.520  
0.550  
-
MIN  
1.14  
0.38  
0.38  
0.10  
0.10  
-
MAX  
2.92  
0.56  
0.48  
0.23  
0.15  
18.80  
13.21  
13.97  
-
NOTES  
D
A
b
0.045  
0.015  
0.015  
0.004  
0.004  
-
-
-
-A-  
-B-  
S1  
b1  
c
-
-
b
c1  
D
-
E1  
3
-
0.004  
Q
H
A - B  
D
0.036  
H
A - B  
D
S
M
S
S
M
S
C
E
0.460  
-
11.68  
-
E
E1  
E2  
E3  
e
3
-
-D-  
A
0.180  
0.030  
4.57  
0.76  
-H-  
-C-  
-
-
7
-
L
E2  
L
E3  
E3  
0.050 BSC  
1.27 BSC  
SEATING AND  
BASE PLANE  
c1  
LEAD FINISH  
k
0.008  
0.250  
0.026  
0.00  
-
0.015  
0.370  
0.045  
-
0.20  
6.35  
0.66  
0.00  
-
0.38  
9.40  
1.14  
-
2
-
L
BASE  
METAL  
Q
S1  
M
N
8
6
-
(c)  
b1  
0.0015  
0.04  
M
M
(b)  
28  
28  
-
SECTION A-A  
Rev. 0 5/18/94  
NOTES:  
1. Index area: A notch or a pin one identification mark shall be locat-  
ed adjacent to pin one and shall be located within the shaded  
area shown. The manufacturer’s identification shall not be used  
as a pin one identification mark. Alternately, a tab (dimension k)  
may be used to identify pin one.  
2. If a pin one identification mark is used in addition to a tab, the lim-  
its of dimension k do not apply.  
3. This dimension allows for off-center lid, meniscus, and glass  
overrun.  
4. Dimensions b1 and c1 apply to lead base metal only. Dimension  
M applies to lead plating and finish thickness. The maximum lim-  
its of lead dimensions b and c or M shall be measured at the cen-  
troid of the finished lead surfaces, when solder dip or tin plate  
lead finish is applied.  
5. N is the maximum number of terminal positions.  
6. Measure dimension S1 at all four corners.  
7. For bottom-brazed lead packages, no organic or polymeric mate-  
rials shall be molded to the bottom of the package to cover the  
leads.  
8. Dimension Q shall be measured at the point of exit (beyond the  
meniscus) of the lead from the body. Dimension Q minimum  
shall be reduced by 0.0015 inch (0.038mm) maximum when sol-  
der dip lead finish is applied.  
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.  
10. Controlling dimension: INCH.  
FN4355.5  
April 6, 2012  
7

与5962F9563005VXC相关器件

型号 品牌 描述 获取价格 数据表
5962F9563005VYC INTERSIL Rad-Hard 16 Channel BiCMOS Analog Multiplexer with High-Z Analog Input Protection

获取价格

5962F9563101QEC INTERSIL Radiation Hardened Quad Differential Line Receiver

获取价格

5962F9563101QXC INTERSIL Radiation Hardened Quad Differential Line Receiver

获取价格

5962F9563101V9A INTERSIL Radiation Hardened Quad Differential Line Receiver

获取价格

5962F9563101VEC INTERSIL Radiation Hardened Quad Differential Line Receiver

获取价格

5962F9563101VEX RENESAS QUAD LINE RECEIVER, CDIP16, SIDE BRAZED, CERAMIC, DIP-16

获取价格