5秒后页面跳转
5962F1321501VXC PDF预览

5962F1321501VXC

更新时间: 2024-02-16 02:26:51
品牌 Logo 应用领域
瑞萨 - RENESAS /
页数 文件大小 规格书
16页 547K
描述
SPECIALTY ANALOG CIRCUIT

5962F1321501VXC 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:SIP,Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.57
模拟集成电路 - 其他类型:ANALOG CIRCUITJESD-30 代码:R-CSIP-T2
长度:2.2095 mm功能数量:1
端子数量:2最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:SIP封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified筛选级别:MIL-PRF-38535 Class Q
座面最大高度:6.862 mm最大供电电压 (Vsup):31 V
最小供电电压 (Vsup):4 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:BIPOLAR
温度等级:MILITARY端子形式:THROUGH-HOLE
端子位置:SINGLE处于峰值回流温度下的最长时间:NOT SPECIFIED
总剂量:300k Rad(Si) V宽度:1.1555 mm
Base Number Matches:1

5962F1321501VXC 数据手册

 浏览型号5962F1321501VXC的Datasheet PDF文件第10页浏览型号5962F1321501VXC的Datasheet PDF文件第11页浏览型号5962F1321501VXC的Datasheet PDF文件第12页浏览型号5962F1321501VXC的Datasheet PDF文件第13页浏览型号5962F1321501VXC的Datasheet PDF文件第14页浏览型号5962F1321501VXC的Datasheet PDF文件第15页 
ISL71590SEH  
Package Outline Drawing  
K2.A  
2 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE  
Rev 1, 4/12  
0.030 (0.762) REF  
PIN NO. 1 ID OPTIONAL  
POSITIVE LEAD INDICATOR (NO. 1)  
0.050 (1.270) BSC  
1
2
0.019 (0.483)  
0.015 (0.381)  
PIN NO. 1 ID AREA  
A
A
0.093 (2.362)  
0.081 (2.057)  
0.240 (6.10)  
0.220 (5.59)  
0.500 (12.70) MIN  
TOP VIEW  
0.210 (5.33)  
0.190 (4.83)  
0.050 (1.270)  
0.041 (1.041)  
0.0065 (0.1651)  
0.0045 (0.1143)  
0.014 (0.356) REF  
SIDE VIEW  
0.0065 (0.1651)  
0.0045 (0.1143)  
LEAD FINISH  
NOTES:  
0.0095 (0.2413)  
0.0045 (0.1143)  
BASE  
Index area: A notch or a pin one identification mark shall be located  
adjacent to pin one and shall be located within the shaded area shown.  
The manufacturer’s identification shall not be used as a pin one  
identification mark. Alternately, a tab may be used to identify pin one.  
1.  
METAL  
0.019 (0.48)  
0.015 (0.38)  
2. If a pin one identification mark is used in addition to a tab, the limits  
of the tab dimension do not apply.  
0.0015 (0.04)  
MAX  
3. The maximum limits of lead dimensions (section A-A) shall be  
measured at the centroid of the finished lead surfaces, when solder  
dip or tin plate lead finish is applied.  
0.022 (0.56)  
0.015 (0.38)  
3
4. Dimensioning and tolerancing conform to ANSI Y14.5M-1982.  
5. Dimensions: Inch (mm). Controlling dimension: Inch.  
SECTION A-A  
September 26, 2013  
FN8376.0  
16  

与5962F1321501VXC相关器件

型号 品牌 描述 获取价格 数据表
5962F1422501VXC STMICROELECTRONICS TWO TERM VOLTAGE REFERENCE

获取价格

5962F1422601VXC RENESAS QUAD OP-AMP, 250uV OFFSET-MAX, 1.5MHz BAND WIDTH, CDFP14, ROHS COMPLIANT, HERMETIC SEALED,

获取价格

5962F1422602V9A RENESAS DUAL OP-AMP, 250uV OFFSET-MAX, 1.5MHz BAND WIDTH, UUC8, ROHS COMPLIANT, DIE-8

获取价格

5962F1820901VXC TI 耐辐射加固保障 (RHA)、QMLV、300krad、12 位、双通道 3.2GSPS 或

获取价格

5962F1820901VYF TI 耐辐射加固保障 (RHA)、QMLV、300krad、12 位、双通道 3.2GSPS 或

获取价格

5962F2021601VXC TI 具有 SEFI 监控套件的航天级 (QMLV-RHA) 10/100/1000 以太网 P

获取价格